Low Skew, 1-to-2, Differential-to-2.5V, 3.3V
LVPECL/ ECL Fanout Buffer
Datasheet
85311I
General Description
The 85311I is a low skew, high performance 1-to-2
Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer. The CLK,
nCLK pair can accept most standard differential input levels.The
85311I is characterized to operate from either a 2.5V or a 3.3V
power supply. Guaranteed output and part-to-part skew
characteristics make the 85311I ideal for those clock distribution
applications demanding well defined performance and repeatability.
Features
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Two differential 2.5V/3.3V LVPECL / ECL outputs
One CLK, nCLK input pair
CLK, nCLK pair can accept the following differential input levels:
LVDS, LVPECL, LVHSTL, SSTL, HCSL
Maximum output frequency: 1GHz
Translates any single ended input signal to 3.3V LVPECL levels
with resistor bias on nCLK input
Output skew: 20ps (maximum)
Part-to-part skew: 350ps (maximum)
Propagation delay: 2.1ns (maximum)
Additive phase jitter, RMS: 0.14ps (typical), 3.3V
LVPECL mode operating voltage supply range:
V
CC
= 2.375V to 3.465V, V
EE
= 0V
ECL mode operating voltage supply range:
V
CC
= 0V, V
EE
= -2.375V to -3.465V
-40°C to 85°C ambient operating temperature
Available in lead-free (RoHS 6) package
Block Diagram
CLK
Pulldown
nCLK
Pullup
Q0
nQ0
Q1
nQ1
Pin Assignment
Q0
nQ0
Q1
nQ1
1
2
3
4
8
7
6
5
V
CC
CLK
nCLK
V
EE
85311I
8-Lead SOIC
3.90mm x 4.903mm x 1.37mm package body
M Package
Top View
©2016 Integrated Device Technology, Inc.
1
Revision B, February 18, 2016
85311I Datasheet
Pin Description and Pin Characteristic Tables
Table 1. Pin Descriptions
Number
1, 2
3, 4
5
6
7
8
Name
Q0, nQ0
Q1, nQ1
V
EE
nCLK
CLK
V
CC
Output
Output
Power
Input
Input
Power
Pullup
Pulldown
Type
Description
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Negative supply pin.
Inverting differential clock input.
Non-inverting differential clock input.
Positive supply pin.
NOTE:
Pullup and Pulldown
refer to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
R
PULLUP
Parameter
Input Capacitance
Input Pullup Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
k
k
R
PULLDOWN
Input Pulldown Resistor
©2016 Integrated Device Technology, Inc.
2
Revision B, February 18, 2016
85311I Datasheet
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuos Current
Surge Current
Storage Temperature, T
STG
Package Thermal Impedance,
JA
Rating
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
-65C to 150C
103C/W (0 lfpm)
DC Electrical Characteristics
Table 3A. Power Supply DC Characteristics,
V
CC
= 3.3V±5% or 2.5V±5%, V
EE
= 0V, T
A
= -40°C to 85°C
Symbol
V
CC
I
EE
Parameter
Positive Supply Voltage
2.375
Power Supply Current
2.5
2.625
25
V
mA
Test Conditions
Minimum
3.135
Typical
3.3
Maximum
3.465
Units
V
Table 3B. Differential DC Characteristics,
V
CC
= 3.3V±5% or 2.5V±5%, V
EE
= 0V, T
A
= -40°C to 85°C
Symbol
I
IH
Parameter
nCLK
Input High Current
CLK
nCLK
I
IL
V
PP
V
CMR
Input Low Current
CLK
Peak-to-Peak Input Voltage;
NOTE 1
Common Mode Input Voltage;
NOTE 1, 2
Test Conditions
V
CC
= V
IN
= 3.465V or 2.625V
V
CC
= V
IN
= 3.465V or 2.625V
V
CC
= 3.465V or 2.625V, V
IN
= 0V
V
CC
= 3.465V or 2.625V, V
IN
= 0V
-150
-5
0.15
V
EE
+ 0.5
1.3
V
CC
– 0.85
Minimum
Typical
Maximum
5
150
Units
µA
µA
µA
µA
V
V
NOTE 1: V
IL
should not be less than -0.3V.
NOTE 2: Common mode voltage is defined as V
IH
.
©2016 Integrated Device Technology, Inc.
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Revision B, February 18, 2016
85311I Datasheet
Table 3C. LVPECL DC Characteristics,
V
CC
= 3.3V±5%, V
EE
= 0V, T
A
= -40°C to 85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Current; NOTE 1
Output Low Current; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
– 1.4
V
CC
– 2.0
0.65
Typical
Maximum
V
CC
– 0.9
V
CC
– 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50 to V
CC
– 2V.
Table 3D. LVPECL DC Characteristics,
V
CC
= 2.5V±5%, V
EE
= 0V, T
A
= -40°C to 85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Current; NOTE 1
Output Low Current; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
– 1.4
V
CC
– 2.0
0.4
Typical
Maximum
V
CC
– 0.9
V
CC
– 1.5
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50 to V
CC
– 2V.
AC Electrical Characteristics
Table 4A. AC Characteristics,
V
CC
= 3.3V±5%, V
EE
= 0V, T
A
= -40°C to 85°C
Symbol
f
MAX
t
PD
tjit
tsk(o)
tsk(pp)
t
R
/ t
F
odc
Parameter
Maximum Output Frequency
Propagation Delay; NOTE 1
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
Output Skew; NOTE 2, 4
Part-to-Part Skew; NOTE 3, 4
Output Rise/Fall Time
Output Duty Cycle
20% to 80% @ 50MHz
300
45
ƒ
1GHz
156.25MHz, Integration Range
(12kHz – 20MHz)
0.9
0.14
20
350
700
55
Test Conditions
Minimum
Typical
Maximum
1
2.1
Units
GHz
ns
ps
ps
ps
ps
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. Device will meet specifications after thermal equilibrium has
been reached under these conditions.
All parameters are measured 500MHz unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential cross
points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltage and with equal load conditions. Using
the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
©2016 Integrated Device Technology, Inc.
4
Revision B, February 18, 2016
85311I Datasheet
Table 4B. AC Characteristics,
V
CC
= 2.5V±5%, V
EE
= 0V, T
A
= -40°C to 85°C
Symbol
f
MAX
t
PD
tjit
tsk(o)
tsk(pp)
t
R
/ t
F
odc
Parameter
Maximum Output Frequency
Propagation Delay; NOTE 1
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
Output Skew; NOTE 2, 4
Part-to-Part Skew; NOTE 3, 4
Output Rise/Fall Time
Output Duty Cycle
20% to 80% @ 50MHz
250
45
ƒ
1GHz
156.25MHz, Integration Range
(12kHz – 20MHz)
0.9
0.135
25
250
700
55
Test Conditions
Minimum
Typical
Maximum
1
2.1
Units
GHz
ns
ps
ps
ps
ps
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. Device will meet specifications after thermal equilibrium has
been reached under these conditions.
All parameters are measured 500MHz unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential cross
points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltage and with equal load conditions. Using
the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
©2016 Integrated Device Technology, Inc.
5
Revision B, February 18, 2016
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