73M1903
Modem Analog Front End
PRODUCT DATA SHEET
JANUARY 2004
DESCRIPTION
The TDK 73M1903 Analog Front End (AFE) IC
includes fully differential hybrid driver outputs,
which connect to the telephone line interface
through a transformer-based DAA. The receive
pins are also fully differential for maximum
flexibility and performance. This arrangement
allows for the design of a high performance
hybrid circuit to improve signal to noise
performance under low receive level conditions,
and compatibility with any standard transformer
intended for PSTN communications applications.
The device incorporates a programmable
sample rate circuit to support soft modem and
DSP based implementations of all speeds up to
V.92 (56Kbps). The sampling rates supported
are from 7.2kHz to 14.4kHz by programming
pre-scaler NCO and PLL NCO.
The TDK 73M1903 device incorporates a digital
host interface that is compatible with the serial
ports found on most commercially available
DSPs and processors and exchanges both
payload and control information with the host.
Cost saving features of the device include an
input reference frequency circuit, which accepts
a range of crystals from 9-27MHz. It also
accepts external reference clock values between
9-40MHz generated by the host processor. In
most applications, this eliminates the need for a
dedicated crystal oscillator and reduces the bill
of material (BOM).
The 73M1903 also supports two analog loop
back and one digital loop back test modes.
The 73M1903 in 32-TQFP package is footprint
compatible with 73M2901CL embedded modem
and allows for the same circuit design to
accommodate soft modem, V.22bis hard
modem, and high speed (V.32bis/V.34/V.92)
applications through population of an external
data pump device.
FEATURES
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Up to 56Kbps (V.92) performance
Programmable sample rates (7.2 - 14.4kHz)
Reference clock range of 9-40MHz
Crystal frequency range of 9-27MHZ
Host synchronous serial interface operation
Pin compatible with 73M2901CL modem
Low power modes
On board line interface drivers
Fully differential receiver and transmitter
Drivers for transformer interface
3.0V – 3.6V operation
5V tolerant I/O
Industrial temperature range (-40 to +85°C)
JATE compliant transmit spectrum
Package options: 32-TQFP and 32-MLF
APPLICATIONS
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Set Top Boxes
Personal Video Recorders (PVR)
Multifunction Peripherals (MFP)
Fax Machines
Internet Appliances
Game Consoles
Point of Sale Terminals
Automatic Teller Machines
Speaker Phones
RF Modems
VBG
(HYBRID)
TXAP
TXAN
Transmit
Drivers/
Filters
Receive
Mux/
Filters
DAA
Controls
Analog
Sigma
Delta
Ref.
SCLK
SDIN
RXAP
RXAN
DAC
Control
Registers
Serial
Port
SDOUT
FSB
GPIO
HOOK
Clocks
Control
Logic
Crystal
http://www.tdksemiconductor.com
TDK SEMICONDUCTOR CONFIDENTIAL
1/08/04 R4.031
73M1903
Modem Analog Front End
PRODUCT DATA SHEET
REVISION HISTORY
Revision Level
2.4
Revision Date
March 13, 2003
Revision Description
Generated Preliminary Datasheet Release
Inconsistent Pin-out tables corrected; Entered
limitation on effective divide > = 2.0; VBG=1.19V; Fs
range increased to 14.4kHz; Gain change in ALB
mode (Txd code must be reduced by 3dB);SCLK drive
strength increased by x5.
Make changes to reflect B01
Make changes to reflect B02
Make changes to delete test comments and pass
band ripple
Revised front sheet, added block diagram, IDD current
changed.
Add active low fonts, clean up register map, match
text to figures, general cleanup
Update footer revision on pages 1,2
Removed Pin 21 CLKOUT signal from package
drawing.
Update divider tables, RXG[1,0] setting, misc.
corrections
2.5
May 22, 2003
3.0
3.3
3.4
3.5
3.6
3.7
3.8
June 2003
August 2003
August 2003
September 2003
September 9, 2003
September 9,2003
October 10, 2003
http://www.tdksemiconductor.com
TDK SEMICONDUCTOR CONFIDENTIAL
1/08/04 R4.031
73M1903
Modem Analog Front End
PRODUCT DATA SHEET
Table of Contents
DESCRIPTION
............................................................................................................................................. 1
FEATURES...................................................................................................................................................
1
APPLICATIONS............................................................................................................................................
1
REVISION HISTORY....................................................................................................................................
2
SIGNAL DESCRIPTION
............................................................................................................................... 5
SERIAL INTERFACE....................................................................................................................................
7
MEMORY MAP...........................................................................................................................................
10
GPIO
........................................................................................................................................................... 12
ANALOG I/O
............................................................................................................................................... 12
CLOCK GENERATION...............................................................................................................................
14
Crystal Oscillator and Pre-scaler NCO
.............................................................................................. 14
MODEM RECEIVER...................................................................................................................................
20
MODEM TRANSMITTER
........................................................................................................................... 23
TEST MODES
............................................................................................................................................ 27
POWER SAVING MODES
......................................................................................................................... 27
ELECTRICAL SPECIFICATIONS
.............................................................................................................. 28
ABSOLUTE MAXIMUM RATINGS
........................................................................................................ 28
RECOMMENDED OPERATING CONDITIONS
..................................................................................... 28
DIGITAL SPECIFICATIONS.......................................................................................................................
29
DC CHARACTERISTICS
....................................................................................................................... 29
AC TIMING
............................................................................................................................................. 30
ANALOG SPECIFICATIONS......................................................................................................................
31
DC SPECIFICATIONS............................................................................................................................
31
AC SPECIFICATIONS............................................................................................................................
31
PERFORMANCE
.................................................................................................................................... 32
PACKAGE OPTIONS
................................................................................................................................. 35
MECHANICAL DRAWINGS
....................................................................................................................... 36
MECHANICAL DRAWINGS cont.
.............................................................................................................. 37
APPENDIX A
.............................................................................................................................................. 38
73M1903 DAA Resistor Calculation Guide
......................................................................................... 38
APPENDIX B
.............................................................................................................................................. 41
Crystal Oscillator
.................................................................................................................................. 41
PLL..........................................................................................................................................................
42
Examples of NCO settings
................................................................................................................... 43
ORDERING INFORMATION
...................................................................................................................... 46
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TDK SEMICONDUCTOR CONFIDENTIAL
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1/08/04 R4.031
73M1903
Modem Analog Front End
PRODUCT DATA SHEET
List of Figures
Figure 1 -SCLK
and
FS
with SckMode = 0
............................................................................................... 9
Figure 2 -Control
frame position vs. SPOS..............................................................................................
9
Figure 3 -Serial
Port Timing Diagram
..................................................................................................... 11
Figure 4 -Analog
block diagram..............................................................................................................
13
Figure 5 -Clock Generation......................................................................................................................
19
Figure 6 -Overall Receiver Frequency Response..................................................................................
21
Figure 7 -Rx Path Passband Response..................................................................................................
21
Figure 8 -RXD
Spectrum of 1kHz tone....................................................................................................
22
Figure 9 -RXD Spectrum of 0.5kHz, 1kHz, 2kHz, 3kHz and 3.5kHz tones of Equal Amplitudes
....... 22
Figure 10 -Frequency Response of TX Path for DC to 4kHz in band Signal
...................................... 23
Figure 11 -Serial
Port Data Timing..........................................................................................................
30
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TDK SEMICONDUCTOR CONFIDENTIAL
4 / 46
1/08/04 R4.031
73M1903
Modem Analog Front End
PRODUCT DATA SHEET
SIGNAL DESCRIPTION
The TDK 73M1903 modem AFE IC is available in a 32 pin TQFP or MLF package with same pin out. The
following table describes the function of each pin. There are two pairs of power supply pins, VPA(analog)
and VPD(digital). They should be separately decoupled from the supply source in order to isolate digital
noise from the analog circuits internal to the chip. Failure to adequately isolate and decouple these
supplies will compromise device performance.
PIN NAME
VND
VNA
VPD
VPA
VPPLL
VNPLL
RST
OSCIN
OSCOUT
GPIO(0-7)
VREF
RXAP
RXAN
TXAP
TXAN
SCLK
SDOUT
SDIN
FS
TYPE
SckMode
TYPE
GND
GND
PWR
PWR
PWR
PWR
I
I
O
I/O
O
I
I
O
O
O
O
I
O
I
I
PIN #
1,22
16
2,25
10
20
17
9
19
18
3, 4, 5, 6,
23, 24,30,31
13
15
14
12
11
8
32
29
7
27
28
DESCRIPTION
Negative Digital Ground
Negative Analog Ground
Positive Digital Supply
Positive Analog Supply
Positive PLL Supply, shared with VPD
Negative PLL Ground
Master reset. When this pin is a logic 0 all registers are reset to
their default states; Weak-pulled high- default
Crystal oscillator input. When providing an external clock
source, drive OSCIN.
Crystal oscillator circuit output pin.
Software definable digital input/output pins.
Reference voltage pin (Reflects Vref)
Receive analog positive input.
Receive analog negative input.
Transmit analog positive output
Transmit analog negative output
Serial interface clock. With SCLK continuous selected,
Frequency = 256*Fs ( =2.4576MHz for Fs=9.6kHz)
Serial data output (or input to the host).
Serial data input (or output from the host)
Frame synchronization. (Active Low)
Type of frame sync. Open, weak-pulled high = early (mode1);
tied low = late (mode0)
Controls the SCLK behavior after FS. Open, weak-pulled high
= SCLK Continuous; tied low = 32 clocks per R/W cycle.
Table 1: -32 TQFP and MLF Pin Description
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5 / 46
1/08/04 R4.031
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