Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers
April 2007
Single-Channel: 6N138, 6N139
Dual-Channel: HCPL2730, HCPL2731
Low Input Current High Gain Split
Darlington Optocouplers
Features
■
Low current – 0.5mA
■
Superior CTR-2000%
■
Superior CMR-10kV/µs
■
CTR guaranteed 0–70°C
■
U.L. recognized (File # E90700)
■
VDE recognized (File # 120915) Ordering option V,
tm
Description
The 6N138/9 and HCPL2730/HCPL2731 optocouplers
consist of an AlGaAs LED optically coupled to a high
gain split darlington photodetector.
The split darlington configuration separating the input
photodiode and the first stage gain from the output
transistor permits lower output saturation voltage and
higher speed operation than possible with conventional
darlington phototransistor optocoupler. In the dual
channel devices, HCPL2730/HCPL2731, an integrated
emitter-base resistor provides superior stability over
temperature.
The combination of a very low input current of 0.5mA
and a high current transfer ratio of 2000% makes this
family particularly useful for input interface to MOS,
CMOS, LSTTL and EIA RS232C, while output compati-
bility is ensured to CMOS as well as high fan-out TTL
requirements. An internal noise shield provides excep-
tional common mode rejection of 10 kV/µs.
e.g., 6N138V
■
Dual Channel – HCPL2730, HCPL2731
Applications
■
Digital logic ground isolation
■
Telephone ring detector
■
EIA-RS-232C line receiver
■
High common mode noise line receiver
■
µP bus isolation
■
Current loop receiver
Schematic
Package
N/C 1
8 V
CC
+ 1
V
F1
8 V
CC
8
1
+ 2
V
F
7 V
B
_ 2
7 V
01
_
3
6 V
O
_
V
3
6 V
02
F2
8
5 GND
8
1
1
N/C 4
5 GND
+ 4
6N138 / 6N139
HCPL2730 / HCPL2731
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3
www.fairchildsemi.com
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers
Absolute Maximum Ratings
(T
A
= 25°C unless otherwise specified
)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
T
STG
T
OPR
T
SOL
EMITTER
I
F
(avg)
I
F
(pk)
I
F
(trans)
V
R
P
D
DETECTOR
I
O
(avg)
V
ER
V
CC
, V
O
P
O
Average Output Current
Emitter-Base Reverse Voltage
Supply Voltage, Output Voltage
DC/Average Forward Input Current
Storage Temperature
Operating Temperature
Parameter
Value
-55 to +125
-40 to +85
260 for 10 sec
Units
°C
°C
°C
Lead Solder Temperature (Wave solder only. See recommended reflow profile graph for
SMD mounting)
Each Channel
Each Channel
20
40
1.0
mA
mA
A
V
mW
Peak Forward Input Current (50% duty cycle, 1 ms P.W.)
Peak Transient Input Current - (
≤
1µs P.W., 300 pps)
Reverse Input Voltage
Input Power Dissipation
Each Channel
Each Channel
5
35
Each Channel
(6N138 and 6N139)
(6N138, HCPL2730)
(6N139, HCPL2731)
60
0.5
-0.5 to 7
-0.5 to 18
100
mA
V
V
Output Power Dissipation
Each Channel
mW
Electrical Characteristics
(T
A
= 0 to 70°C unless otherwise specified)
Individual Component Characteristics
Symbol
EMITTER
V
F
BV
R
(
∆
V
F
/
∆
T
A
)
DETECTOR
I
OH
Logic HIGH output current
(I
F
= 0mA, V
O
= V
CC
= 18V)
Each Channel
(I
F
= 0mA, V
O
= V
CC
= 7V)
Each Channel
I
CCL
Logic LOW supply
(I
F
= 1.6mA, V
O
= Open)
(V
CC
= 18V)
(I
F1
= I
F2
= 1.6mA, V
CC
= 18V)
(V
O1
- V
O2
= Open, V
CC
= 7V
I
CCH
Logic HIGH supply
(I
F
= 0mA, V
O
= Open,
V
CC
= 18V)
(I
F1
= I
F2
= 0mA, V
CC
= 18V)
(V
O1
- V
O2
= Open, V
CC
= 7V
*All Typicals at T
A
= 25°C
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3
www.fairchildsemi.com
2
Parameter
Input Forward Voltage
Test Conditions
T
A
= 25°C
Each channel (I
F
= 1.6mA)
(T
A
= 25°C, I
R
= 10µA)
Each Channel
Device
All
Min. Typ.* Max.
1.30
1.7
1.75
Unit
V
Input Reverse Breakdown Voltage
All
5.0
20
V
Temperature coefficient of forward voltage (I
F
= 1.6mA)
All
-1.8
mV/°C
6N139
HCPL2731
6N138
HCPL2730
6N138
6N139
HCPL2731
HCPL2730
6N138
6N139
HCPL2731
HCPL2730
0.01
100
µA
0.01
250
0.4
1.3
1.5
3
mA
0.05
0.10
10
20
µA
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers
Transfer Characteristics
(T
A
= 0 to 70°C unless otherwise specified)
Symbol
COUPLED
CTR
Current transfer ratio
(Note 1, 2)
(I
F
= 0.5mA, V
O
= 0.4 V, V
CC
= 4.5V)
Each Channel
(I
F
= 1.6mA, V
O
= 0.4 V, V
CC
= 4.5V)
Each Channel
(I
F
= 1.6mA, V
O
= 0.4 V, V
CC
= 4.5V)
Each Channel
V
OL
Logic LOW output voltage
output voltage (Note 2)
(I
F
= 0.5mA, I
O
= 2mA, V
CC
= 4.5V)
(I
F
= 1.6mA, I
O
= 8mA, V
CC
= 4.5V)
Each Channel
(I
F
= 0.5mA, I
O
= 15mA, V
CC
= 4.5V)
Each Channel
(I
F
= 12mA, I
O
= 24mA, V
CC
= 4.5V)
Each Channel
(I
F
= 1.6mA, I
O
= 4.8mA, V
CC
= 4.5V)
Each Channel
6N139
HCPL2731
6N139
HCPL2731
6N138
HCPL2730
6N139
6N139
HCPL2731
6N139
HCPL2731
6N139
HCPL2731
6N138
HCPL2730
0.10
0.4
0.20
0.4
0.13
0.4
300
500
400
1100
3500
1300
2500
1300
2500
0.08
0.01
0.4
0.4
V
%
Parameter
Test Conditions
Device
Min.
Typ.*
Max.
Unit
*All Typicals at T
A
= 25°C
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3
www.fairchildsemi.com
3
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers
Switching Characteristics
(T
A
= 0 to 70°C unless otherwise specified., V
CC
= 5V)
Symbol Parameter
T
PHL
Propagation delay
time to logic LOW
(Note 2) (Fig. 24)
Test Conditions
(R
L
= 4.7
Ω
, I
F
= 0.5mA)
T
A
= 25°C
(R
L
= 4.7
Ω
, I
F
= 0.5mA)
Each Channel
T
A
= 25°C
(R
L
= 270
Ω
, I
F
= 12mA)
T
A
= 25°C
(R
L
= 270
Ω
, I
F
= 12mA)
Each Channel
T
A
= 25°C
T
A
= 25°C
(R
L
= 2.2Ω, I
F
= 1.6mA)
Each Channel
T
A
= 25°C
Each Channel
(R
L
= 4.7Ω, I
F
= 0.5mA) T
A
= 25°C
Each Channel
(R
L
= 270Ω, I
F
= 12mA)
T
A
= 25°C
(R
L
= 270Ω, I
F
= 12mA) Each Channel
T
A
= 25°C
(R
L
= 2.2Ω, I
F
= 1.6mA)
Each Channel
(R
L
= 2.2Ω, I
F
= 1.6mA) T
A
= 25°C
Each Channel
(R
L
= 2.2
Ω,
I
F
= 1.6mA)
Device
6N139
Min.
Typ.*
4
Max. Unit
30
25
120
µs
HCPL2731
3
6N139
0.2
HCPL2730
HCPL2731
6N138
1.5
HCPL2731
HCPL2730
6N139
HCPL2731
6N139
HCPL2731
6N139
1.3
HCPL2730
HCPL2731
6N138
HCPL2730/1
6N138
HCPL2730/1
6N138
6N139
HCPL2730
HCPL2731
6N138
6N139
HCPL2730
HCPL2731
1,000
10,000
1,000
7
16
10,000
12
22
0.3
100
2
1
3
2
15
10
25
1
20
90
µs
T
PLH
Propagation delay
time to logic HIGH
(Note 2) (Fig. 24)
(R
L
= 4.7Ω, I
F
= 0.5mA)
60
10
7
15
5
10
50
35
|CM
H
|
Common mode
transient immunity
at logic HIGH
(Note 3) (Fig. 25)
Common mode
transient immunity
at logic LOW
(Note 3) (Fig. 25)
(I
F
= 0mA, |V
CM
| = 10V
P-P
)
T
A
= 25°C, (R
L
= 2.2Ω)
Each Channel
(I
F
= 1.6mA, |V
CM
| = 10V
P-P
, R
L
= 2.2Ω)
T
A
= 25°C
Each Channel
V/µs
|CM
L
|
V/µs
** All Typicals at T
A
= 25°C
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3
www.fairchildsemi.com
4
Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers
Isolation Characteristics
(T
A
= 0 to 70°C unless otherwise specified)
Symbol
I
I-O
Characteristics
Input-output
insulation leakage current
(Note 4)
Withstand insulation test voltage
(Note 4)
Resistance (input to output)
(Note 4)
Capacitance (input to output)
(Note 4, 5)
Input-Input
Insulation leakage current
(Note 6)
Input-Input Resistance
(Note 6)
Input-Input Capacitance
(Note 6)
Test Conditions
(Relative humidity = 45%)
(T
A
= 25°C, t = 5 s)
(V
I-O
= 3000VDC)
(RH
≤
50%, T
A
= 25°C, I
I-O
≤
2µA)
( t = 1 min.)
(V
I-O
= 500VDC)
(f = 1MHz)
(RH
≤
45%, V
I-I
= 500VDC)
t = 5 s, (HCPL2730/2731 only)
(V
I-I
= 500VDC)
(HCPL2730/2731 only)
(f = 1 MHz)
(HCPL2730/2731 only)
Min.
Typ.*
Max.
1.0
Unit
µA
V
ISO
R
I-O
C
I-O
I
I-I
2500
10
12
0.6
0.005
V
RMS
Ω
pF
µA
R
I-I
C
I-I
10
11
0.03
Ω
pF
** All Typicals at T
A
= 25°C
Notes:
1. Current Transfer Ratio is defined as a ratio of output collector current, I
O
, to the forward LED input current, I
F
, times 100%.
2. Pin 7 open. (6N138 and 6N139 only)
3. Common mode transient immunity in logic HIGH level is the maximum tolerable (positive) dV
cm
/dt on the leading edge of
the common mode pulse signal V
CM
, to assure that the output will remain in a logic HIGH state (i.e., V
O
> 2.0V). Common
mode transient immunity in logic LOW level is the maximum tolerable (negative) dV
cm
/dt on the trailing edge of the
common mode pulse signal, V
CM
, to assure that the output will remain in a logic LOW state (i.e., V
O
< 0.8V).
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted
together.
5. For dual channel devices, C
I-O
is measured by shorting pins 1 and 2 or pins 3 and 4 together and pins 5 through 8 shor ted
together.
6. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
I
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3
www.fairchildsemi.com
5
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