12-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling Analog-to-Digital Converter (LVDS Interface) 256-FCBGA -40 to 85
| 参数名称 | 属性值 |
| Sample Rate(Max)(MSPS) | 3200,6400 |
| Operating Temperature Range(C) | -40 to 85 |
| Resolution(Bits) | 12 |
| # Input Channels | 2,1 |
| Power Consumption(Typ)(mW) | 3150 |
| INL(Typ)(+/-LSB) | 3 |
| DNL(Typ)(+/-LSB) | 0.3 |
| Interface | DDR LVDS,Parallel LVDS |
| ENOB(Bits) | 9 |
| SNR(dB) | 56.6 |
| Analog Input BW(MHz) | 7800 |
| Package Group | FCBGA |
| Reference Mode | Int |
| Input Buffer | Yes |
| Approx. Price (US$) | 2599.97 | 100u |
| Input Range(Vp-p) | 0.8 |
| Architecture | Folding Interpolating |
| SINAD(dB) | 56 |
| SFDR(dB) | 67 |
| PADC12DL3200ACF | ADC12DL3200ACF | |
|---|---|---|
| 描述 | 12-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling Analog-to-Digital Converter (LVDS Interface) 256-FCBGA -40 to 85 | 12-Bit, Dual 3.2-GSPS or Single 6.4-GSPS, RF-Sampling Analog-to-Digital Converter (LVDS Interface) 256-FCBGA -40 to 85 |
电子工程世界版权所有
京B2-20211791
京ICP备10001474号-1
电信业务审批[2006]字第258号函
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved