SNC12012
One Channel Speech Controller
===================== CONTENTS =====================
1.
2.
3.
4.
5.
INTRODUCTION............................................................................................................3
FEATURES ......................................................................................................................3
PIN ASSIGNMENT.........................................................................................................3
BLOCK DIAGRAM ........................................................................................................4
FUNCTION DESCRIPTIONS .......................................................................................4
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
6.
7.
8.
O
SCILLATOR
...............................................................................................................4
ROM ..........................................................................................................................4
RAM ..........................................................................................................................5
P
OWER
D
OWN
M
ODE
..................................................................................................5
S
AMPLING
R
ATE
C
OUNTER
.........................................................................................5
I/O P
ORTS
...................................................................................................................5
P
USH
-P
ULL
O
UTPUT
...................................................................................................6
W
ATCH
D
OG
T
IMER
....................................................................................................6
IR F
UNCTION
..............................................................................................................6
ABSOLUTE MAXIMUM RATING ..............................................................................6
ELECTRICAL CHARACTERISTICS .........................................................................7
APPLICATION CIRCUIT .............................................................................................8
Ver: 1.4
1
March 17, 2005
SNC12012
One Channel Speech Controller
AMENDENT HISTORY
Version
Ver 1.3
Ver 1.4
Ver 1.5
Date
January 14, 2005
March 17,2005
May 25, 2005
First issue
Modify Standby & operation current
Remove APPLICATION CIRCUIT RST pin capacitance
Add IR Description
Description
Ver: 1.4
2
March 17, 2005
SNC12012
One Channel Speech Controller
1. INTRODUCTION
SNC12012 is a one-channel voice synthesizer IC with Push-Pull direct drive circuit. It
built-in a 4-bit tiny controller with three 4-bit I/O ports. By programming through the tiny
controller in SNC12012, user’s varied applications including voice section combination,
key trigger arrangement, output control, and other logic functions can be easily
implemented.
2. FEATURES
Single power supply 2.4V – 5.5V
12 seconds voice capacity are provided (@6KHZ sample rate)
Built in a 4-bit tiny controller
I/O Port
−
Three 4-bit I/O ports P1, P2 and P3 are provided.
−
The driving/sink current of P3.2 & P3.3 is up to 8mA/16mA
−
The IO pins P3.3 can be modulated with 38.5Khz carry signal to implement IR
function.
64*4 bits RAM are provided
Maximum 16k program ROM is provided
40K*10 shared ROM for voice data and program
Readable ROM code data
Built in one channel speech synthesizer
Adaptive playing speed from 2.5k-20kHz is provided
Built in an 8-level volume control Push-Pull Direct Drive circuit output, can directly
connected to Speaker for sound output.
System clock: 2MHz
Event Mark function supported
Low Power Reset
Watch Dog Timer Supported
3. PIN ASSIGNMENT
Symbol
P10~P13
P20~P23
P30~P33
Rosc
BUO1
BUO2
RST
VDD
GND
Test
Ver: 1.4
I/O
I/O
I/O
I/O
I
O
O
I
I
I
I
Function Description
I/O port 1: IO
I/O port 2: IO
I/O port 3: IO
Oscillation component connection pin
Push-Pull output 1
Push-Pull output 2
RST=1 Reset Chip (Active H)
Positive power supply
Negative power supply
Test pin
3
March 17, 2005
SNC12012
One Channel Speech Controller
4.
Block Diagram
ROM
Program/Speech
40K×10 bits
Address Pointers/ STACK
SRAM (64 nibbles)
Timer
ALU
IO port 1
Timing
Generator
OSC
Sampling Rate Counter
Watch Dog
Timer
Push-Pull
Circuit
IO port 3
Voice
Synthesizer
IO port 2
5. FUNCTION DESCRIPTIONS
5.1 Oscillator
SNC12012 accepts RC type oscillator for system clock. The typical circuit diagram for
oscillator is listed as follows.
VCC
RC Oscillator
5.2 ROM
SNC12012 contains a substantial 40K words (10-bit) internal ROM, which is shared by
program and resource data. Program, voice and data are shared within this same 40K
words ROM.
Ver: 1.4
4
r
March 17, 2005
OSC
SNC12012
One Channel Speech Controller
5.3 RAM
SNC12012 contains 64 nibble RAM (64 x 4-bits). The 64 nibble RAM is divided into
four pages (page 0 to page 3, 16 nibble RAM on each page). In our programming
structure, users can use the instructions, PAGE n (n=0 to 3) to switch and indicate the
RAM page. Besides, users can use direct mode, M0 ~ M15 in the data transfer type
instructions, to access all 16 nibbles of each page
5.4 Power Down Mode
“End” instruction makes the IC entering into Stop Mode will stop the system clock for
power savings (<3uA @VDD=3V and <6uA @VDD=4.5V.) Any valid data transition
(L H or H L) occurring on any IO pin can be used to start the system clock and
return to normal operating mode.
5.5 Sampling Rate Counter
The unique sampling rate counter is designed in voice channel to be able to play
diverse voices at different sample playing rates. The playing rate can be adaptively set
up among from the wide ranges of 2.5KHz to 20KHz. This architecture yields a
high-quality voice synthesis that sounds very close to its original source when played
through the same amplifier and speaker circuitry.
5.6 I/O Ports
There are three 4-bit I/O ports P1, P2, and P3. Any I/O can be individually
programmed as either input pull low or output. Any valid data transition (H L or
L H) of P1, P2 and P3 can reactivate the chip when it is in power-down stage.
Port Data
PAD
Port Status
Weak
To Internal Data Bus
Read Control
I/O Port Configuration
Note:
(1)
Weak N-MOS can serve as pull-low resistor.
(2)
The driving/sink current of P3.3 & P3.2 is up to 8mA/16mA
5
Ver: 1.4
March 17, 2005