MC100EP14
3.3V / 5V 1:5 Differential
ECL/PECL/HSTL Clock Driver
Description
The MC100EP14 is a low skew 1−to−5 differential driver, designed with
clock distribution in mind, accepting two clock sources into an input
multiplexer. The ECL/PECL input signals can be either differential or
single−ended (if the V
BB
output is used). HSTL inputs can be used when
the LVEP14 is operating under PECL conditions.
The EP14 specifically guarantees low output−to−output skew. Optimal
design, layout, and processing minimize skew within a device and from
device to device.
To ensure that the tight skew specification is realized, both sides of
any differential output need to be terminated even if only one output is
being used. If an output pair is unused, both outputs may be left open
(unterminated) without affecting skew.
The common enable (EN) is synchronous, outputs are enabled/
disabled in the LOW state. This avoids a runt clock pulse when the
device is enabled/disabled as can happen with an asynchronous
control. The internal flip flop is clocked on the falling edge of the input
clock, therefore all associated specification limits are referenced to the
negative edge of the clock input.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single−ended input conditions, the unused
differential input is connected to V
BB
as a switching reference voltage.
V
BB
may also rebias AC coupled inputs. When used, decouple V
BB
and V
CC
via a 0.01
mF
capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V
BB
should be left open.
Features
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TSSOP−20
DT SUFFIX
CASE 948E
MARKING DIAGRAM*
20
100
EP14
ALYWG
G
1
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
•
•
•
•
•
•
400 ps Typical Propagation Delay
100 ps Device−to−Device Skew
25 ps Within Device Skew
Maximum Frequency > 2 GHz Typical
The 100 Series Contains Temperature Compensation
PECL and HSTL Mode:
V
CC
= 3.0 V to 5.5 V with V
EE
= 0 V
•
NECL Mode:
V
CC
= 0 V with V
EE
= −3.0 V to −5.5 V
•
Open Input Default State
•
These are Pb−Free Devices
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
©
Semiconductor Components Industries, LLC, 2014
1
April, 2014 − Rev. 7
Publication Order Number:
MC100EP14/D
MC100EP14
V
CC
20
EN
19
V
CC
18
CLK1
17
CLK1
16
V
BB
15
CLK0
14
CLK0
13
CLK_SEL
12
V
EE
11
1
0
D
Q
1
Q0
2
Q0
3
Q1
4
Q1
5
Q2
6
Q2
7
Q3
8
Q3
9
Q4
10
Q4
WARNING: All V
CC
and V
EE
pins must be externally connected
to Power Supply to guarantee proper operation.
Figure 1. TSSOP−20
(Top View)
and Logic Diagram
Table 1. PIN DESCRIPTION
Pin
CLK0*, CLK0**
CLK1*, CLK1**
Q0:4, Q0:4
CLK_SEL*
EN*
V
BB
V
CC
V
EE
Function
ECL/PECL/HSTL CLK Input
ECL/PECL/HSTL CLK Input
ECL/PECL Outputs
ECL/PECL Active Clock Select Input
ECL Sync Enable
Reference Voltage Output
Positive Supply
Negative Supply
Table 2. FUNCTION TABLE
CLK0
L
H
X
X
X
CLK1
X
X
L
H
X
CLK_SEL
L
L
H
H
X
EN
L
L
L
L
H
Q
L
H
L
H
L*
* On next negative transition of CLK0 or CLK1
* Pins will default low when left open.
** Pins will default to V
CC
/2 when left open.
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MC100EP14
Table 3. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Machine Model
Charged Device Model
Pb Pkg
Level 1
Value
75 kW
37.5 kW
> 4 kV
> 200 V
> 2 kV
Pb−Free Pkg
Level 1
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
TSSOP−8
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
357 Devices
Table 4. MAXIMUM RATINGS
Symbol
V
CC
V
EE
V
I
I
out
I
BB
T
A
T
stg
q
JA
q
JC
T
sol
Parameter
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode Input Voltage
NECL Mode Input Voltage
Output Current
V
BB
Sink/Source
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Wave Solder
0 lfpm
500 lfpm
Standard Board
<2 to 3 sec @ 248°C
TSSOP−20
TSSOP−20
TSSOP−20
Condition 1
V
EE
= 0 V
V
CC
= 0 V
V
EE
= 0 V
V
CC
= 0 V
Continuous
Surge
V
I
V
CC
V
I
V
EE
Condition 2
Rating
6
−6
6
−6
50
100
±
0.5
−40 to +85
−65 to +150
140
100
23 to 41
265
Unit
V
V
V
V
mA
mA
mA
°C
°C
°C/W
°C/W
°C/W
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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MC100EP14
Table 5. 100EP DC CHARACTERISTICS, PECL
V
CC
= 3.3 V, V
EE
= 0 V (Note 2)
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
V
BB
V
IHCMR
Characteristic
Power Supply Current
Output HIGH Voltage (Note 3)
Output LOW Voltage (Note 3)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 4)
Input HIGH Current
Input LOW Current
D
D
0.5
−150
Min
45
2155
1305
2075
1305
1775
1.2
1875
Typ
55
2280
1480
Max
65
2405
1605
2420
1675
1975
3.3
Min
48
2155
1305
2075
1305
1775
1.2
1875
25°C
Typ
58
2280
1480
Max
68
2405
1605
2420
1675
1975
3.3
Min
52
2155
1305
2075
1305
1775
1.2
1875
85°C
Typ
62
2280
1480
Max
72
2405
1605
2420
1675
1975
3.3
Unit
mA
mV
mV
mV
mV
mV
V
I
IH
I
IL
150
0.5
−150
150
0.5
−150
150
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.3 V to −2.2 V.
3. All loading with 50
W
to V
CC
− 2.0 V.
4. V
IHCMR
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential
input signal.
Table 6. 100EP DC CHARACTERISTICS, PECL
V
CC
= 5.0 V, V
EE
= 0 V (Note 5)
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
V
BB
V
IHCMR
Characteristic
Power Supply Current
Output HIGH Voltage (Note 6)
Output LOW Voltage (Note 6)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 7)
Input HIGH Current
Input LOW Current
D
D
0.5
−150
Min
45
3855
3005
3775
3005
3475
1.2
3575
Typ
55
3980
3180
Max
65
4105
3305
4120
3375
3675
5.0
Min
48
3855
3005
3775
3005
3475
1.2
3575
25°C
Typ
58
3980
3180
Max
68
4105
3305
4120
3375
3675
5.0
Min
52
3855
3005
3775
3005
3475
1.2
3575
85°C
Typ
62
3980
3180
Max
72
4105
3305
4120
3375
3675
5.0
Unit
mA
mV
mV
mV
mV
mV
V
I
IH
I
IL
150
0.5
−150
150
0.5
−150
150
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +2.0 V to −0.5 V.
6. All loading with 50
W
to V
CC
− 2.0 V.
7. V
IHCMR
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential
input signal.
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MC100EP14
Table 7. 100EP DC CHARACTERISTICS, NECL
V
CC
= 0 V; V
EE
= −5.5 V to −3.0 V (Note 8)
−40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
V
BB
V
IHCMR
Characteristic
Power Supply Current
Output HIGH Voltage (Note 9)
Output LOW Voltage (Note 9)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Reference Voltage
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 10)
Input HIGH Current
Input LOW Current CLK
CLK
0.5
−150
Min
45
−1145
−1995
−1225
−1995
−1525
−1425
Typ
55
−1020
−1820
Max
65
−895
−1695
−880
−1625
−1325
0.0
Min
48
−1145
−1995
−1225
−1995
−1525
−1425
25°C
Typ
58
−1020
−1820
Max
68
−895
−1695
−880
−1625
−1325
0.0
Min
52
−1145
−1995
−1225
−1995
−1525
−1425
85°C
Typ
62
−1020
−1820
Max
72
−895
−1695
−880
−1625
−1325
0.0
Unit
mA
mV
mV
mV
mV
mV
V
V
EE
+1.2
V
EE
+1.2
V
EE
+1.2
I
IH
I
IL
150
0.5
−150
150
0.5
−150
150
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Input and output parameters vary 1:1 with V
CC
.
9. All loading with 50
W
to V
CC
− 2.0 V.
10. V
IHCMR
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential
input signal.
Table 8. AC CHARACTERISTICS
V
CC
= 0 V; V
EE
= −3.0 V to −5.5 V or V
CC
= 3.0 V to 5.5 V; V
EE
= 0 V (Note 11)
−40°C
Symbol
V
OPP
t
PLH
t
PHL
t
skew
Characteristic
Output Voltage Amplitude @ 2 GHz
(Figure 2)
Propagation Delay to
Output Differential
Within−Device Skew
Device−to−Device Skew
(Note 12)
Setup Time to CLK EN to CLK
Hold Time
EN to CLK
Cycle−to−Cycle Jitter (Figure 2)
Minimum Input Swing
Output Rise/Fall Time (20%−80%)
150
105
100
200
Min
440
275
Typ
540
330
25
100
50
140
0.2
800
155
<1
1200
205
150
145
400
35
125
100
200
Max
Min
420
275
25°C
Typ
520
375
30
150
50
140
0.2
800
200
<1
1200
270
150
150
450
45
175
100
200
Max
Min
380
280
85°C
Typ
480
380
40
175
50
140
0.2
800
225
<1
1200
300
480
50
200
Max
Unit
GHz
ps
ps
t
s
t
h
t
JITTER
V
PP
t
r
/t
f
ps
ps
mV
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
11. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50
W
to V
CC
− 2.0 V.
12. Skew is measured between outputs under identical transitions.
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