UNISONIC TECHNOLOGIES CO., LTD
MJE13007
NPN BIPOLAR POWER
TRANSISTOR FOR SWITCHING
POWER SUPPLY
APPLICATIONS
DESCRIPTION
The UTC
MJE13007
is designed for high–voltage, high–speed
power switching inductive circuits where fall time is critical. It is
particularly suited for 115 and 220 V switch mode applications.
NPN SILICON TRANSISTOR
1
TO-220
1
TO-220F
FEATURES
* V
CEO(SUS)
400 V
* 700 V Blocking Capability
*Pb-free plating product number: MJE13007L
ORDERING INFORMATION
Order Number
Normal
Lead Free Plating
MJE13007-TA3-T
MJE13007L-TA3-T
MJE13007-TF3-T
MJE13007L-TF3-T
Package
TO-220
TO-220F
Pin Assignment
1
2
3
B
C
E
B
C
E
Packing
Tube
Tube
MJE13007L-TA3-T
(1)Packing Type
(2)Package Type
(3)Lead Plating
(1)T: Tube
(2) TA3: TO-220, TF3: TO-220F
(3) L: Lead Free Plating, Blank: Pb/Sn
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Copyright © 2005 Unisonic Technologies Co., Ltd
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QW-R203-019.D
MJE13007
ABSOLUTE MAXIMUM RATING
PARAMETER
Collector-Emitter Sustaining Voltage
Collector-Emitter Breakdown Voltage
Emitter-Base Voltage
Collector Current
Base Current
Emitter Current
Continuous
Peak (1)
Continuous
Peak (1)
Continuous
SYMBOL
V
CEO
V
CBO
V
EBO
I
C
I
CM
I
B
I
BM
I
E
NPN SILICON TRANSISTOR
RATINGS
400
700
9.0
8.0
16
4.0
8.0
12
UNIT
V
V
V
A
A
A
A
A
Peak (1)
I
EM
24
A
Total Device Dissipation
T
C
= 25℃
P
D
80
W
℃
Operating and Storage Junction Temperature Range
T
J,
T
STG
-65 ~ +125
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
THERMAL DATA
PARAMETER
SYMBOL
RATINGS
UNIT
Thermal Resistance Junction to Case
θ
JC
1.56
℃
/W
Thermal Resistance Junction to Ambient
℃
/W
62.5
θ
JA
Note 1: Pulse Test: Pulse Width = 5.0 ms, Duty Cycle≤10%.
Measurement made with thermocouple contacting the bottom insulated mounting surface of the package
(in a location beneath the die), the device mounted on a heatsink with thermal grease applied at a
mounting torque of 6 to 8•lbs.
ELECTRICAL CHARACTERISTICS
(T
C
=25℃, unless otherwise noted)
PARAMETER
Collector-Emitter Sustaining Voltage
Collector Cutoff Current
Emitter Cutoff Current
DC Current Gain
SYMBOL
TEST CONDITIONS
V
CEO(SUS)
I
C
=10mA, I
B
=0
V
CBO
=700V
I
CBO
V
CBO
=700V, T
C
=125℃
I
EBO
V
EB
=9.0V, I
C
=0
h
FE1
I
C
=2.0A, V
CE
=5.0V
h
FE2
I
C
=5.0A, V
CE
=5.0V
I
C
=2.0A, I
B
=0.4A
I
C
=5.0A, I
B
=1.0A
V
CE(SAT)
I
C
=8.0A, I
B
=2.0A
I
C
=5.0A, I
B
=1.0A, T
C
=100℃
I
C
=2.0A, I
B
=0.4A
V
BE(SAT)
I
C
=5.0A, I
B
=1.0A
I
C
=5.0A, I
B
=1.0A, T
C
=100℃
f
T
I
C
=500mA, V
CE
=10V, f=1.0 MHz
C
ob
V
CB
=10V, I
E
=0, f=0.1MHz
MIN
400
TYP
MAX UNIT
V
0.1
mA
1.0
mA
100
µA
40
30
1.0
V
2.0
V
3.0
V
3.0
V
1.2
V
1.6
V
1.5
V
MHz
pF
0.1
1.5
3.0
0.7
8.0
5.0
Collector-Emitter Saturation Voltage
Base-Emitter Saturation Voltage
Current-Gain-Bandwidth Product
Output Capacitance
Resistive Load (Table 1)
Delay Time
t
D
V
CC
=125V, I
C
=5.0A,
Rise Time
t
R
I
B1
=I
B2
=1.0A, t
p
=25µs,
Storage Time
t
S
Duty Cycle
≦
1.0%
Fall Time
t
F
* Pulse Test: Pulse Width≤300μs, Duty Cycle≤2.0%
4.0
14
80
0.025
0.5
1.8
0.23
µs
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2 of 6
QW-R203-019.D
MJE13007
TYPICAL THERMAL RESPONSE
1
0.7
D=0.5
0.5
D=0.2
0.2
0.1
0.07 D=0.05
0.05 D=0.02
0.02
D=0.01
D=0.1
P(pk)
t1
t2
SINGLE PULSE
0.05
0.1
0.2
0.5
1
2
NPN SILICON TRANSISTOR
Figure1. Typical Thermal Response
Transient thermal resistance,
r(t) (NORMALIZED)
DUTY CYCLE, D=t1/t2
5
10
20
50
R
θJC
(t)=r(t)R
θJC
R
θJC
=1.56℃/W MAX
D CURVES APPLY FOR
POWER
PULSE TRAIN SHOWN
READ TIME AT t
1
TJ
(pk)
-T
C
=P
(pk )
R
θJC
(t)
100
200
500
10k
0.01
0.01 0.02
Time, t (msec)
There are two limitations on the power handling ability of a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
C
-V
CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 7 is based on T
C
= 25℃; T
J(pk)
is variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be debated when T
C
≥25℃.
Second breakdown limitations do not
debate the same as thermal limitations. Allowable current at the voltages shown on Figure 7 may be found at any
case temperature by using the appropriate curve on Figure 9.
At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
Use of reverse biased safe operating area data (Figure 8) is discussed in the applications information section.
UNISONIC TECHNOLOGIES CO., LTD
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3 of 6
QW-R203-019.D
MJE13007
V
CC
NPN SILICON TRANSISTOR
Table 1. Test Conditions for Dynamic Performance
RESISTIVE
SWITCHING
+125
REVERSE BIAS SAFE OPERATING AREA AND INDUCTIVE SWITCHING
TEST CIRCUITS
+15V
1µF
150Ω
3W
MPF930
100Ω
3W
MTP8P10
MTP8P10
100µF
L
MUR8100E
R
B1
+10V
MPF930
MUR105
MJE210
R
C
A
I
B
I
B
TUT
I
C
Vclamp=300V
R
B2
R
B
5.1k
V
CE
51
TUT
D1
SCOPE
COMMON
Voff
500Ω
500µF
150Ω
3W
MTP12N10
1µF
-4V
CIRCUIT VALUES
Inductive
Switching
L=20mH
L=10mH
R
B2
=0
R
B2
=8
V
CC
=20V
V
CC
=15V
I
C(pk )
=100mA R
B1
selected
for desired I
B1
BV
CEO (SUS)
I
C
I
CM
t
RBSOA
L=500mH
R
B2
=0
V
CC
=15Volts
R
B1
selected
for desired I
B1
TYPICAL
WAVEFORMS
V
CE
PEAK
V
CE
I
B1
I
B
I
B2
V
CC
=125V
R
C
=25Ω
D1=1N5820 OR EQUIV
t
f
CLAMPED
t
f
UNCLAMPED≒t2 t1 ADJUSTED TO
OBTAIN I
C
t1
≤
t1
t
f
Lcoil(I
CM
)
V
CC
+11V
0
25µs
Lcoil(I
CM)
t2
≤
Vclamp
TEST EQUIPMENT
SCOPE-TEKTRONIX
475 OR EQUIVALENT
t
9V
t
r
, t
f
<10ns
DUTY CYCLE=1.0%
RB AND RC ADJUSTED
FOR DESIRED IB AND I
C
V
CE
V
CEM
Vclamp
TIME
t2
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4 of 6
QW-R203-019.D
MJE13007
TYPICAL CHARACTERISTICS
Figure 2. Base-Emitter Saturation Voltage
1.4
Base-Emitte Saturation Voltage,
V
BE(SAT)
(V)
Collector-Emitte Saturation Voltage,
V
CE(SAT)
(V)
NPN SILICON TRANSISTOR
Figure 3. Collector-Emitter Saturation Voltage
10
5
2
1
0.5
0.2
0.1
0.05
0.02
I
C
=-40℃
25℃
100℃
2
5 10
I
C
/I
B
=5
I
C
/I
B
=5
1.2
1
I
C
=-40℃
0.8
0.6
25℃
100℃
0.4
0.01 0.02 0.05 0.1 0.2 0.5 1
2
5 10
0.01
0.01 0.02 0.05 0.1 0.2 0.5 1
Collector Current, I
C
(A)
Collector Current, I
C
(A)
Figure 4. Collector Saturation Region
3
Collector-Emitter Voltage,
V
CE
(V)
Figure 5. DC Current Gain
100
DC Current Gain, h
FE
T
J
=25℃
V
CE
=5
T
J
=100℃
25℃
2.5
2
1.5
1
0.5
I
C
=1A
0.5 1
2 3 5
10
I
C
=5A
I
C
=3A
I
C
=8A
10
40℃
0
0.01 0.02 0.05 0.1 0.2
1
0.01
0.1
1
10
Base Current, I
B
(A)
Collector Current, I
C
(A)
Figure 6. Capacitance
10000
T
J
=25℃
100
50
Figure 7. Maximum Forward Bias Safe
Operating Area
Extended
SOA@1μs,10μs
1μs
Collector Current, I
C
(A)
10
100
1000
Capacitance, C (pF)
C
ib
1000
C
ob
100
20
10
10
0.1
1
10
5
T
C
=25℃
μs
2
1ms
DC
1
5ms
0.5
0.2
Bonding wire limit
0.1
Thermal limit
0.05
Second breakdown limit
curves apply below
0.02
rated V
CE O
0.01
10 20 30 50 70 100 200300 500 1000
Collector-Emitter Voltage, V
CE
(V)
Reverse Voltage,V
R
(V)
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QW-R203-019.D
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