SRAM
AS5C512K8
512K x 8 SRAM
HIGH SPEED SRAM with
REVOLUTIONARY PINOUT
AVAILABLE AS MILITARY
SPECIFICATIONS
•SMD 5962-95600
•SMD 5962-95613
•MIL-STD-883
PIN ASSIGNMENT
(Top View)
36-Pin SOJ (DJ, ECJ & SOJ)
36-Pin CLCC (EC)
FEATURES
• Ultra High Speed Asynchronous Operation
• Fully Static, No Clocks
• Multiple center power and ground pins for improved
noise immunity
• Easy memory expansion with CE\ and OE\
options
• All inputs and outputs are TTL-compatible
• Single +5V Power Supply +/- 10%
• Data Retention Functionality Testing
• Cost Efficient Plastic Packaging
• Extended Testing Over -55ºC to +125ºC for plastics
• Plastic 36 pin PSOJ is fully compatible with the
Ceramic 36 pin SOJ and offered in lead free finish
• 3.3V Future Offering
36-Pin Flat Pack (F)
OPTIONS
• Timing
12ns access
15ns access
17ns access
20ns access
25ns access
35ns access
45ns access
• Operating Temperature Ranges
Full Military (-55
o
C to +125
o
C)
Military (-55
o
C to +125
o
C) XT
Industrial (-40
o
C to +85
o
C) IT
MARKING
-12
-15
-17
-20
-25
-35
-45
/883C
GENERAL DESCRIPTION
The AS5C512K8 is a high speed SRAM. It offers flexibility in
high-speed memory applications, with chip enable (CE\) and output
enable (OE\) capabilities. These features can place the outputs in
High-Z for additional flexibility in system design.
Writing to these devices is accomplished when write enable (WE\)
and CE\ inputs are both LOW. Reading is accomplished when WE\
remains HIGH and CE\ and OE\ go LOW.
As a option, the device can be supplied offering a reduced power
standby mode, allowing system designers to meet low standby power
requirements. This device operates from a single +5V power supply
and all inputs and outputs are fully TTL-compatible.
The AS5C512K8DJ offers the convenience and reliability of the
AS5C512K8 SRAM and has the cost advantage of a durable plastic.
The AS5C512K8DJ is footprint compatible with 36 pin CSOJ pack-
age of the SMD 5692-95600.
Micross Components reserves the right to change products or specifications without notice.
• Package(s)
Ceramic LCC
EC
Ceramic Flatpack
F
Plastic SOJ (Lead Free)*
DJ
Ceramic SOJ (attached formed lead) ECJ
Ceramic SOJ
SOJ
* Pb finish also available, contact factory
• 2V data retention/low power
L
For more products and information
please visit our web site at
www.micross.com
AS5C512K8
Rev. 7.2 01/10
1
SRAM
AS5C512K8
FUNCTIONAL BLOCK DIAGRAM
VCC
GND
DQ8
INPUT BUFFER
ROW DECODER
I/O
CONTROLS
4,194,304-BIT
MEMORY ARRAY
1024 ROWS X
4096 COLUMNS
A0-A18
DQ1
CE\
COLUMN DECODER
OE\
WE\
*POWER
DOWN
*On the low voltage Data Retention option.
PIN FUNCTIONS
A0 - A18
Address Inputs
Write Enable
Chip Enable
Output Enable
Data Inputs/Outputs
Power
Ground
No Connection
TRUTH TABLE
MODE
OE\ CE\ WE\
STANDBY
X
H
X
READ
L
L
H
NOT SELECTED H
L
H
WRITE
X
L
L
X = Don’t Care
WE\
I/O
HIGH-Z
Q
HIGH-Z
D
POWER
STANDBY
ACTIVE
ACTIVE
ACTIVE
CE\
OE\
I/O
0
- I/O
7
V
CC
V
SS
NC
AS5C512K8
Rev. 7.2 01/10
Micross Components reserves the right to change products or specifications without notice.
2
SRAM
AS5C512K8
*Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. This
Voltage on Vcc Supply Relative to Vss
Vcc ....................................................................-.5V to +7.0V is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in the
Storage Temperature (Plastic)......................-65°C to +150°C
operation section of this specification is not implied. Exposure
Storage Temperature (Ceramic)...................-55°C to +125°C
Short Circuit Output Current (per I/O)…........................20mA to absolute maximum rating conditions for extended periods
Voltage on any Pin Relative to Vss.................-.5V to Vcc+1V may affect reliability.
Maximum Junction Temperature**..............................+150°C ** Junction temperature depends upon package type, cycle time,
Power Dissipation ................................................................1W loading, ambient temperature and airflow, and humidity.
ABSOLUTE MAXIMUM RATINGS*
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55
o
C < T
A
< +125
o
C & -40
o
C < T
A
< +85
o
C ; Vcc = 5V +10%)
µ
µ
CAPACITANCE
PARAMETER
Input Capacitance
Output Capactiance
CONDITIONS
T
A
= 25 C, f = 1MHz
V
IN
= 0
o
SYMBOL
C
I
Co
MAX
12
14
UNITS
pF
pF
NOTES
4
4
AS5C512K8
Rev. 7.2 01/10
Micross Components reserves the right to change products or specifications without notice.
3
SRAM
AS5C512K8
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(-55
o
C < T
A
< +125
o
C or -40
o
C to +85
o
C; Vcc = 5V +10%)
AS5C512K8
Rev. 7.2 01/10
Micross Components reserves the right to change products or specifications without notice.
4
SRAM
AS5C512K8
AC TEST CONDITIONS
Input pulse levels ............................................... Vss to 3.0V
Input rise and fall times .................................................. 3ns
Input timing reference levels ........................................ 1.5V
Output reference levels .................................................. 1.5V
Output load ................................................. See Figures 1
Q
167 ohms
1.73V
C=30pF
Q
167 ohms
1.73V
C=5pF
Fig. 1 Output Load
Equivalent
Fig. 2 Output Load
Equivalent
and 2
NOTES
1.
2.
3.
4.
5.
6.
All voltages referenced to V
SS
(GND).
-2V for pulse width < 20ns
I
CC
is dependent on output loading and cycle rates.
This parameter is guaranteed but not tested.
Test conditions as specified with the output loading
as shown in Fig. 1 unless otherwise noted.
t
LZCE,
t
LZWE,
t
LZOE,
t
HZCE,
t
HZOE and
t
HZWE
are specified with CL = 5pF as in Fig. 2. Transition is
measured ±200mV from steady state voltage.
At any given temperature and voltage condition,
t
HZCE is less than
t
LZCE, and
t
HZWE is less than
t
LZWE.
8.
9.
10.
11.
12.
13.
14.
15.
7.
WE\ is HIGH for READ cycle.
Device is continuously selected. Chip enables and
output enables are held in their active state.
Address valid prior to, or coincident with, latest
occurring chip enable.
t
RC = Read Cycle Time.
Chip enable and write enable can initiate and
terminate a WRITE cycle.
Output enable (OE\) is inactive (HIGH).
Output enable (OE\) is active (LOW).
ASI does not warrant functionality nor reliability of
any product in which the junction temperature
exceeds 150°C. Care should be taken to limit power to
acceptable levels.
DATA RETENTION ELECTRICAL CHARACTERISTICS
(L Version Only)
DESCRIPTION
Vcc for Retention Data
Data Retention Current
Chip Deselect to Data
Operation Recovery Time
CONDITIONS
CE\ > V
CC
-0.2V
V
IN
> V
CC
-0.2 or 0.2V
Vcc = 2.0V
SYM
V
DR
I
CCDR
t
CDR
t
R
0
10
MIN
2
800
MAX
UNITS
V
uA
ns
ms
4
4, 11
NOTES
AS5C512K8
Rev. 7.2 01/10
Micross Components reserves the right to change products or specifications without notice.
5
stm32/stm8
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