Si2457/34/15/04
V.9 0 , V.3 4, V. 3 2
BI S
, V.22
B IS
I SO
MO DE M ®
Features
This data sheet applies to Si2457/34/
Integrated DAA
15/04 Revision D
Over 6000 V capacitive
isolation
Data modem formats
WITH
G
L O B A L
DAA
Bell
300 bps up to 56 kbps
V.21,V.22, V.29 Fast Connect
V.44, V.42, V.42bis, MNP2-5
Automatic rate negotiation
ITU-T,
Parallel
phone detect
Globally-compliant line
interface
Overcurrent detection
Type I and II caller ID decode
No external ROM or RAM required
UART, SPI, or parallel interface
Flexible clock options
Low-cost
32.768 kHz oscillator
4.915 MHz oscillator
27 MHz clock input
AT command set support
SMS / MMS support
Firmware upgradeable
EEPROM interface
Lead-free, RoHS-compliant
packages
Commercial or industrial
temperature range
DTMF detection/generation
Ordering Information
This data sheet is valid only for
those chipset combinations listed
on page 50.
Pin Assignments
Applications
Set-top boxes
Point-of-sale terminals
Text / video telephones
Digital video recorder
Digital televisions
Remote monitoring
Si2457/34/15/04
(16-Pin Option)
CLKIN/XTALI
XTALO
RI
V
D
MISO/RXD
MOSI/TXD
SCLK/CTS
RESET
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SS/RTS
DCD
ESC
V
A
GND
INT
C1A
C2A
Description
The ISOmodem family of products is a complete modem ranging in speed
from 56,000 bps to 2400 bps. Offered as a chipset with the Si2457, Si2434,
Si2415, or Si2404 system-side device and the Si3018/10 line-side device,
the ISOmodem utilizes Silicon Laboratories’ patented direct access
arrangement (DAA) technology to provide a programmable telephone line
interface with an unparalleled level of integration. These compact solutions
eliminate the need for a separate DSP, modem controller, codec,
transformer, relay, opto-isolators, clocking crystal, and 2-4 wire hybrid.
Available with a system-side packaging option of either a 16-pin SOIC or a
24-pin TSSOP, these devices are ideal for embedded modem applications
due to their flexibility, small footprint, and minimal external component
count.
®
Si2457/34/15/04
(24-Pin Option)
CLKIN/XTALI
XTALO
CLKOUT/EECS/A0
FSYNC/D6
VD3.3
GND
VDA
SS/RTS/D7
MISO/RXD/RD
MOSI/TXD/WR
SCLK/CTS/CS
RESET
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
SDO/EECLK/D5
DCD/D4
ESC/D3
VD3.3
GND
VDB
SDI/EESD/D2
RI/D1
INT/DO
AOUT/INT
C1A
C2A
System Block Diagram
Si3018/10
QE
DCT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
DCT2
IGND
DCT3
QB
QE2
SC
VREG2
RNG2
Host
CPU
Host Interface
Si24xx
System
Side
Si3018
Line
Side
Global
DAA
BOM
Telco
Tip
Ring
RX
IB
C1B
C2B
VREG
RNG1
UART
SPI
Parallel
Capacitive
Isolation Barrier
Rev. 1.3 12/10
Copyright © 2010 by Silicon Laboratories
Si2457/34/15/04
Si2457/34/15/04
2
Rev. 1.3
Si2457/34/15/04
T
A B L E
Section
OF
C
O N T E N TS
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3. Bill of Materials: Si2457/34/15/04 Chipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1. Host Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2. Command Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.3. Data Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.4. Fast Connect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.5. V.80 Synchronous Access Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.6. Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.7. Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.8. Data Compression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.9. Error Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.10. Wire Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.11. Caller ID Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.12. Parallel Phone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.13. Overcurrent Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.14. Global Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.15. Firmware Upgrades . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.16. DTMF Detection / Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.17. SMS/MMS Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.18. Codec Interface (24-Pin Version Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.19. EEPROM Interface (24-Pin Version Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.20. AT Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.21. Extended AT Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5. S-Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6. User-Access Registers (U-Registers) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
7. Pin Descriptions: Si2457/34/15/04 (16-Pin Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
8. Pin Descriptions: Si2457/34/15/04 (24-Pin Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
9. Pin Descriptions: Si3018/10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
10. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
11. Package Markings (Top Markings) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
11.1. Si2457-D-FT Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
11.2. Si2457-D-FS Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
11.3. Si2434-D-FT Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
11.4. Si2434-D-FS Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
11.5. Si2415-D-FT Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
11.6. Si2415-D-FS Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
11.7. Si2404-D-FT Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
11.8. Si2404-D-FS Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
11.9. Si3010-F-FS Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
11.10. Si3018-F-FS Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
12. Package Outline: 24-Pin TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
13. 24-Pin TSSOP Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
14. Package Outline: 16-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
15. 16-Pin SOIC Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Rev. 1.3
3
Si2457/34/15/04
1. Electrical Specifications
Table 1. Recommended Operating Conditions
Parameter
1
Ambient Temperature
Si2457/34/15/04 Supply Voltage,
Digital
3
Symbol
T
A
V
D
Test Condition
F-grade
G-grade
Min
2
0
–40
3.0
Typ
25
25
3.3
Max
2
70
85
3.6
Unit
°C
V
Notes:
1.
The Si2457/34/15/04 specifications are guaranteed when the typical application circuit (including component tolerance)
and any Si2457/34/15/04 and any Si3018 are used. See "2. Typical Application Schematic" on page 11.
2.
All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions.
Typical values apply at nominal supply voltages and an operating temperature of 25 °C unless otherwise stated.
3.
The digital supply, VD, operates from 3.0 to 3.6 V.
Table 2. Loop Characteristics
(V
D
=
3.0 to 3.6 V, T
A
=
0 to 70 °C for F-grade, T
A
=
–40 to 85 °C for G-grade)
Parameter
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
On-Hook Leakage Current
Operating Loop Current
Operating Loop Current
DC Ring Current
Ring Detect Voltage
2
Ring Detect Voltage
2
Ring Frequency
Ringer Equivalence Number
Symbol
V
TR
V
TR
V
TR
V
TR
V
TR
V
TR
V
TR
I
LK
I
LP
I
LP
Test Condition
I
L
= 20 mA, ILIM
1
= 0
DCV = 00, MINI = 11, DCR = 0
I
L
= 120 mA, ILIM = 0
DCV = 00, MINI = 11, DCR = 0
I
L
= 20 mA, ILIM = 0
DCV = 11, MINI = 00, DCR = 0
I
L
= 120 mA, ILIM = 0
DCV = 11, MINI = 00, DCR = 0
I
L
= 20 mA, ILIM = 1
DCV = 11, MINI = 00, DCR = 0
I
L
= 60 mA, ILIM = 1
DCV = 11, MINI = 00, DCR = 0
I
L
= 50 mA, ILIM = 1
DCV = 11, MINI = 00, DCR = 0
V
TR
= –48 V
MINI = 00, ILIM = 0
MINI = 00, ILIM = 1
DC current flowing through ring
detection circuitry
RT = 0
RT = 1
Min
—
9
—
9
—
40
—
—
10
10
—
12
18
15
—
Typ
—
—
—
—
—
—
—
—
—
—
1.5
15
21
—
—
Max
6.0
—
7.5
—
7.5
—
40
5
120
60
3
18
25
68
0.2
Unit
V
V
V
V
V
V
V
µA
mA
mA
µA
V
RMS
V
RMS
Hz
V
RD
V
RD
F
R
REN
Notes:
1.
ILIM = U67, bit 9; DCV = U67, bits 3:2; MINI = U67, bits 13:12; DCR = U67, bit 7; RT = U67, bit 0.
2.
The ring signal is guaranteed to not be detected below the minimum. The ring signal is guaranteed to be detected
above the maximum.
4
Rev. 1.3
Si2457/34/15/04
TIP
+
600
Si3018
V
TR
10 µF
–
I
L
RING
Figure 1. Test Circuit for Loop Characteristics
Table 3. DC Characteristics, V
D
= 3.0 to 3.6 V
(V
D
= 3.0 to 3.6 V, T
A
= 0 to 70 °C for F-grade, T
A
=
–40 to 85 °C for G-grade)
Parameter
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
Input Leakage Current
Pullup Resistance Pins
Total Supply Current
*
Total Supply Current, Wake on Ring
*
Total Supply Current, Powerdown
*
Symbol
V
IH
V
IL
V
OH
V
OL
I
L
R
PU
I
D
I
D
I
D
Test Condition
Min
2.0
—
Typ
—
—
—
—
—
125
17
4.4
80
Max
—
0.8
—
0.35
10
200
35
—
—
Unit
V
V
V
V
µA
k
mA
mA
µA
I
O
= –2 mA
I
O
= 2 mA
2.4
—
–10
50
—
—
PDN = 1
—
*Note:
All inputs at 0 or V
D
. All inputs held static except clock and all outputs unloaded (Static I
OUT
= 0 mA).
Rev. 1.3
5
FPGA/CPLD
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