F1956
Datasheet
7-Bit 0.25 dB Wideband Digital Step Attenuator
G
ENERAL
D
ESCRIPTION
This document describes the specification for the
F1956 Digital Step Attenuator. The F1956 is part of
IDT’s
Glitch-Free
TM
family of DSAs optimized for the
demanding requirements of Base Station (BTS) radio
cards and numerous other non-BTS applications. This
device is offered in compact 5 mm x 5 mm 32-pin
package with 50
input and output impedance for
ease of integration into the radio or RF system.
1 to 6000 MHz
Serial & 7-bit Parallel Interface
31.75 dB Range
0.25 dB steps
Glitch-Free
TM
: low transient overshoot
500 ns settling time
Ultra linear > 64 dBm IIP3
Low Insertion Loss < 1.7 dB @ 4 GHz
Attenuation error < ±0.2 dB @ 4 GHz
Bi-directional RF use
3.3 V or 5 V Supply
1.8 V or 3.3 V control logic
Low Current Consumption: 350
μA
typical
-40 °C to +105 °C operating temperature
5 mm x 5 mm Thin QFN 32 pin package
F
EATURES
C
OMPETITIVE
A
DVANTAGE
The F1956 offers very high reliability due to its
construction from a monolithic silicon die in a QFN
package. The insertion loss is very low with minimal
distortion. Additionally the device is designed to have
extremely accurate attenuations levels. These
accurate attenuation level improves system SNR
and/or ACLR by ensuring system gain is as close to
targeted level as possible. Also, the very fast settling
time in parallel mode is ideal for fast switching
systems. Finally, the device is
Glitch-Free
TM
with less
than 2 dB of ringing across the attenuation range in
stark contrast to competing DSAs that glitch as much
as 10 dB during MSB state changes.
Lowest insertion loss for best SNR
F
UNCTIONAL
B
LOCK
D
IAGRAM
TM
Glitch-Free
TM
RF
1
RF
2
Glitch-Free
TM
technology to protect PA or
ADC during transitions between attenuation
states.
Extremely accurate attenuation levels
Ultra low distortion
MSL1 and 2000 V HBM ESD
Bias
Decoder
SPI
V
MODE
D[6:0] A[2:0]
CLK DATA LE
O
RDERING
I
NFORMATION
Tape &
Reel
Part# Details
Part#
Freq Range Resolution /
Range (dB)
(MHz)
Control
Parallel &
Serial
Serial
Only
Serial
Only
Parallel &
Serial
Parallel &
Serial
Parallel &
Serial
IL
(dB)
1.3
1.2
0.9
1.3
1.4
1.6
Pinout
PE43702
PE43701
HMC305
HMC305
PE4302
DAT-31R5
PE43705,
PE43712,
RFSA3715
PE4312
PE4302
F1956NBGI8
Green
F1950 150 - 4000 0.25 / 31.75
F1951 100 - 4000 0.50 / 31.5
F1952 100 – 4000 0.50 / 15.5
F1953 400 – 4000 0.50 / 31.5
F1956
F1912
1 - 4000
1 – 4000
0.25 / 31.75
0.50 / 31.5
F1956, Rev 2 04/08/2016
1
© 2016 Integrated Device Technology, Inc.
F1956
A
BSOLUTE
M
AXIMUM
R
ATINGS
Parameter
VDD to GND
D[6:0], DATA, CLK, LE, A0, A1, A2, V
MODE
RF1, RF2
Maximum Input Power applied
to RF1 or RF2 (>100 MHz)
Operating Case Temperature
Continuous Power Dissipation
Maximum Junction Temperature
Storage Temperature Range
Lead Temperature (soldering, 10s)
Electrostatic Discharge – HBM
(JEDEC/ESDA JS-001-2012)
ESD Voltage – CDM (Per JESD22-C101F)
TJ
max
T
ST
T
LEAD
V
ESDHBM
V
ESDCDM
-65
Symbol
V
DD
VCNTL
V
RF
P
RF
Min
-0.3
-0.3
-0.3
Max
+5.5
Min (V
DD
+
0.3, 3.9)
+0.3
+34
105
1.5
+150
+150
+260
1500
(Class 1C)
500
(Class C2)
Units
V
V
V
dBm
°C
W
°C
°C
°C
V
V
Stresses above those listed above may cause permanent damage to the device. Functional operation of the device at
these or any other conditions above those indicated in the operational section of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD C
AUTION
This product features proprietary protection circuitry. However, it may be damaged if subjected to high energy ESD.
Please use proper ESD precautions when handling to avoid damage or loss of performance
.
P
ACKAGE
T
HERMAL AND
M
OISTURE
C
HARACTERISTICS
θ
JA
(Junction – Ambient)
θ
JC
(Junction – Case) [The Case is defined as the exposed paddle]
Moisture Sensitivity Rating (Per J-STD-020)
40 °C/W
4 °C/W
MSL1
7-Bit 0.25 dB Wideband Digital Step Attenuator
2
Rev 2 04/08/2016
F1956
F1956 R
ECOMMENDED
O
PERATING
C
ONDITIONS
Parameter
Supply Voltage(s)
Operating Temperature Range
Frequency Range
RF CW Input Power
Symbol
V
DD
T
CASE
F
RF
P
CW
Conditions
Case Temperature
Min
3.00
-40
1
Typ
Max
5.25
+105
6000
See
Figure 1
Units
V
°C
MHz
dBm
RF1 or RF2
RF1 Port, V
DD
= 3.3V,
T
CASE
= 85
°C,
F
RF
> 500 MHz,
WCDMA, 3GPP,
Downlink, 64 DPCH,
Chip rate =3.84 MSPS,
Avg. Pin = +22 dBm
1%
0.1 %
0.01 %
0.001 %
RF Peak Input Power
P
peak
28.9
30.7
32.3
33.2
50
50
Ω
Ω
dBm
RF Source Impedance
RF Load Impedance
Z
RFI
Z
RFO
Single Ended
Single Ended
32
28
Max CW P
IN
(dBm)
24
20
16
12
8
4
0
0.01
0.10
1.00
10.00
100.00
1000.00
Frequency (MHz)
Figure 1 - Maximum Operating RF input power vs Input frequency
Rev 2 04/08/2016
3
7-Bit 0.25 dB Wideband Digital Step Attenuator
F1956
F1956 S
PECIFICATION
Specifications apply at V
DD
= +3.3 V, T
CASE
= +25 °C, F
RF
= 2 GHz, 0.25 dB steps unless otherwise noted. Minimum
Attenuation D[6:0] = [0000000], Maximum Attenuation D[6:0] = [1111111], EVKit losses are de-embedded unless
otherwise noted.
Parameter
Logic Input High
Symbol
V
IH
Conditions
CLK, LE, DATA, D[6:0],
A0, A1, A2, V
MODE
3.0 V ≤ V
DD
≤ 3.6 V
3.6 V < V
DD
CLK, LE, DATA, D[6:0],
A0, A1, A2, V
MODE
Individual Pins
No missing codes
F
RF
4.5 GHz
F
RF
6.5 GHz
F
RF
8.5 GHz
Max to Min Attenuation to
settle to within 0.5 dB of final
value
Min to Max Attenuation to
settle to within 0.5 dB of final
value
Measured at RF ports with
2.5 ns risetime, 0 to 3.3 V
control pulse
Spur Freq ~ 2.2 MHz
SPI 3 wire bus
SPI 3 wire bus
SPI 3 wire bus
SPI 3 wire bus
Time from final serial clock
rising edge
Min
1.17
2
Typ
Max
Units
V
DD
3.6
1.17
1
V
V
μA
μA
dB
dB
Logic Input Low
Logic Current
Supply Current
Attenuation Range
Minimum Gain Step
V
IL
I
IH,
I
IL
I
DD
ATT
RNG
LSB
0.63
-40
350
31.75
0.25
0.50
1.00
0.9
+20
800
DSA Settling time
SET
s
1.8
Video Feedthrough
RF1, RF2 ports
Maximum spurious level on
any RF port
4
Serial Clock Speed
Parallel to Serial Setup
Serial Data Hold Time
LE Delay
Maximum Switching Rate
VID
FT
Spur
MAX
F
CLK
A
B
C
SW
RATE
10
-140
mV
pp
dBm
25
100
10
10
25
MHz
ns
ns
ns
kHz
Specification Notes:
Note 1:
Items in min/max columns in
bold italics
are Guaranteed by Test.
Note 2:
Items in min/max columns that are not bold/italics are Guaranteed by Design Characterization.
Note 3.
The input 0.1 dB compression point is used as a linearity figure of merit. The recommended maximum input power is specified as the
lesser of the two values from RF CW Power (Figure 1) and the RF Average Power (Recommended Operating Conditions Table)..
Note 4:
Spurious due to on-chip negative voltage generator. Typical generator fundamental frequency is 2.2 MHz.
7-Bit 0.25 dB Wideband Digital Step Attenuator
4
Rev 2 04/08/2016
F1956
F1956 S
PECIFICATION
(
CONTINUED
)
Specifications apply at V
DD
= +3.3 V, T
CASE
= +25°C, F
RF
= 2 GHz, 0.25 dB steps unless otherwise noted. Minimum
Attenuation D[6:0] = [0000000], Maximum Attenuation D[6:0] = [1111111], EVKit losses are de-embedded unless
otherwise noted.
Parameter
Symbol
Conditions
1 MHz < F
RF
≤ 2 GHz
2 GHz < F
RF
≤ 3 GHz
Min
Typ
1.3
1.3
1.6
2.1
2.6
12
25
55
90
0.10
Max
1.8
1.9
2.2
2.6
3.0
Units
Insertion Loss
IL
3 GHz < F
RF
≤ 4 GHz
4 GHz < F
RF
≤ 5 GHz
5 GHz < F
RF
≤ 6 GHz
F
RF
= 1 GHz
dB
Relative Phase
(Amin vs. Amax)
Step Error
(Differential Non-Linearity)
Absolute Attenuation Error
(Integral Non-Linearity)
ΦΔ
F
RF
= 2 GHz
F
RF
= 4 GHz
F
RF
= 6 GHz
Max error between adjacent
steps
Max Error for state 19.75 dB,
FRF = 2 GHz
Max Error, over all states
F
RF
= 2 GHz
1 MHz < F
RF
≤ 2 GHz
2 GHz < F
RF
≤ 4 GHz
4 GHz < F
RF
≤ 6 GHz
1 MHz < F
RF
≤ 2 GHz
deg
DNL
0.19
dB
-0.4
-0.8
0.1
+0.5
dB
+0.5
INL
20
20
14
18
16
11
15
15
7
14
12
7
dB
dB
Input Return Loss
S
11
Output Return Loss
S
22
2 GHz < F
RF
≤ 4 GHz
4 GHz < F
RF
≤ 6 GHz
P
IN
= +10 dBm per tone
50 MHz Tone Separation
Attn = 0.00 dB
Attn = 15.75 dB
Attn = 31.75 dB
Attn = 0.00 dB
P
IN
= +22 dBm per tone
1 MHz Tone Separation
F
RF
= 0.7 GHz
F
RF
= 1.8 GHz
F
RF
= 2.2 GHz
F
RF
= 2.6 GHz
60
60
60
60
64
64
64
dBm
Input IP3
IIP3
63.4
63.4
64.1
63.3
34.5
dBm
dBm
Input 0.1dB Compression
3
P
0.1dB
F
RF
= 2 GHz, Attn = 10 dB
Specification Notes:
Note 1:
Items in min/max columns in
bold italics
are Guaranteed by Test.
Note 2:
Items in min/max columns that are not bold/italics are Guaranteed by Design Characterization.
Note 3.
The input 0.1 dB compression point is used as a linearity figure of merit. The recommended maximum input power is specified as the
lesser of the two values from RF CW Power (Figure 1) and the RF Average Power (Recommended Operating Conditions Table)..
Note 4:
Spurious due to on-chip negative voltage generator. Typical generator fundamental frequency is 2.2 MHz.
Rev 2 04/08/2016
5
7-Bit 0.25 dB Wideband Digital Step Attenuator
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