EVALUATION KIT AVAILABLE
MAX15303
6A Digital PoL DC-DC Converter with
InTune Automatic Compensation
General Description
The MAX15303 is a full-featured, flexible, efficient, 6A
digital point-of-load (PoL) controller with integrat-
ed switching MOSFETs. It contains advanced power-
management and telemetry features. Unlike PID-based
digital power regulators, the device uses Maxim’s
patented InTune™ automatically compensated, state-
space control algorithm. The InTune control law is valid for
both the small- and large-signal response and accounts
for duty-cycle saturation effects. These capabilities
result in fast loop transient response and reduce the
number of output capacitors compared to competing digital
controllers.
To help maximize system efficiency and reduce over-
all parts count, the device uses Maxim’s BabyBuck
regulator. The BabyBuck eliminates the need for an
external bias supply. The BabyBuck can be configured in
two different modes to maximize system flexibility.
The device is designed to minimize the end customer’s
design time. Automatic compensation eliminates the
need for external compensation circuitry and allows
changes to the output inductor and capacitor, without the
need to manually redesign the compensation circuitry.
An on-board PMBus™-compliant serial bus interface
enables communication with a supervisory controller for
monitoring and fault management. A full suite of power-
management features eliminates the need for compli-
cated and expensive sequencing and monitoring ICs.
Basic DC-DC conversion operation can be set up through
pin strapping and does not require user-configuration
firmware. This allows for rapid development of the power-
supply subsystem before board-level systems engineer-
ing is completed. Maxim provides support hardware and
software for configuring the device.
The MAX15303 is available in a 40-pin, 6mm x 6mm TQFN
package with an exposed pad and operates over the -40°C
to +85°C temperature range.
InTune is a trademark of Maxim Integrated Products, Inc.
PMBus is a trademark of SMIF, Inc.
Maxim patents apply: 7498781, 7880454, 7696736, 7746048,
7466254, 798613, 7498781, 8,120,401, 8,014,879.
Benefits and Features
● InTune Automatic Compensation Simplifies and
Speeds Design
• Ensures Stability While Optimizing Transient
Performance
• State-Space Compensation Results in Fast
Transient Response with Reduced Output
Capacitance
● Out-of-the-Box Operation Enables Fast Prototyping
• Supports Pin-Strappable Configuration: Output
Voltage, SMBus Address, Switching Frequency,
Current Limit
● Easy to Use PMBus Interface for Configuration,
Control, and Monitoring
• Flexible Sequencing and Fault Management
• Supports Voltage Positioning
• Configurable Soft-Start and Soft-Stop Time
• 300kHz to 1000kHz Fixed-Frequency Operation
● Integration Yields Small Solution Size
• Integrated High- and Low-Side MOSFETs
• Efficient On-Chip BabyBuck Regulator for Self-
Bias Output
• Startup into a Prebiased Output
● Performance Optimized for Communication and
Computing Systems
• Differential Remote Voltage Sensing Enables
±1.25% V
OUT
Accuracy over Temperature
(-40°C to +85°C)
• 4.5V to 14V Wide Input Range
• Output Voltage Range from 0.5V to 5.25V
• External Synchronization
Applications
●
●
●
●
●
Servers
Storage Systems
Routers/Switches
Base-Station Equipment
Power Modules
Ordering Information
and
Typical Operating Circuit
appear
at end of data sheet.
This product is subject to a license from Power-One, Inc.,
related to digital power technology patents owned by Power-
One, Inc. This license does not extend to merchant market
stand-alone power-supply products.
19-7119; Rev 1; 1/15
MAX15303
6A Digital PoL DC-DC Converter with
InTune Automatic Compensation
Absolute Maximum Ratings
PWR to PGND.......................................................-0.3V to +18V
PVIN to PGND.......................................................-0.3V to +18V
LX to PGND........-2V to the minimum of +26V or (V
BST
+ 0.3V)
LXSNS to SGND ......................................................-2V to +14V
INSNS to SGND ....................................................-0.3V to +14V
OUTP, OUTN, DCRP, DCRN to SGND ................-0.3V to +5.5V
3P3 to SGND................................. -0.3V to the minimum of +4V
or (V
GDRV
+ 0.3V)
GDRV to SGND........................... -0.3V to the minimum of +12V
or (V
PWR
+ 0.3V)
LBI to PGND........................................... -0.3V to (V
PWR
+ 0.3V)
LBO to PGND ...........................(V
3P3
- 0.3V) to (V
GDRV
+ 0.3V)
BST to LX .............................................................. -0.3V to +12V
BST to PGND ........................................................-0.3V to +26V
BST to GDRV ........................................................-0.3V to +26V
1P8 to DGND .......................................................-0.3V to +2.2V
CIO, SET, PG, ADDR0, ADDR1, SYNC, TEMPX,
SALRT
to DGND… ..............................................-0.3V to +4V
EN, SCL, SDA to DGND .........................................-0.3V to +4V
PGND to SGND....................................................-0.3V to +0.3V
DGND to SGND ...................................................-0.3V to +0.3V
Electrostatic Discharge (ESD) Rating
Human Body Model (HBM) .........................................±3500V
Machine Model ..............................................................±200V
Junction Temperature ......................................................+125°C
Operating Temperature Range ........................... -40°C to +85°C
Continuous Power Dissipation (T
A
= +70°C)
TQFN (derate 37mW/°C above +70°C).....................2963mW
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) ................................. +300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics
(Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (θ
JA
) ..........27°C/W
Junction-to-Case Thermal Resistance (θ
JC
) ..................1.7°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(All settings = factory default, V
PWR
= V
PVIN =
V
INSNS
= 12V, V
SGND
= V
DGND
= V
PGND
= 0V, V
OUT
= 1.2V, f
SW
= 600kHz.
Specifications are for T
A
= T
J
= -40°C to +85°C, typical values are at T
A
= T
J
= +25°C. See the
Typical Operating Circuit,
unless
otherwise noted.) (Note 2)
PARAMETER
INPUT SUPPLY
Input Voltage Range
Input Supply Current
Input Overvoltage-Lockout
Threshold
Input Undervoltage-Lockout
Threshold
BIAS REGULATORS
3P3 Output Voltage
1P8 Output Voltage
STARTUP/SHUTDOWN TIMING
Firmware Initialization
t
1
From V
IN
> V
UVLO(PWR)
, until ready to
enable (Figure 2)
25
ms
V
3P3
V
1P8
I
LOAD(3P3)
= 0mA
I
LOAD(1P8)
= 0mA
3.3
1.80
V
V
V
PWR
I
PWR
4.5
BabyBuck bias supply, driver not
switching
Linear mode bias supply, driver not
switching
Input rising
Rising edge
Hysteresis
14.3
3.8
10
mA
24
15.2
4.1
0.24
50
16.0
4.4
V
V
14
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
OVLO(PWR)
V
UVLO(PWR)
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Maxim Integrated │ 2
MAX15303
6A Digital PoL DC-DC Converter with
InTune Automatic Compensation
Electrical Characteristics (continued)
(All settings = factory default, V
PWR
= V
PVIN =
V
INSNS
= 12V, V
SGND
= V
DGND
= V
PGND
= 0V, V
OUT
= 1.2V, f
SW
= 600kHz.
Specifications are for T
A
= T
J
= -40°C to +85°C, typical values are at T
A
= T
J
= +25°C. See the
Typical Operating Circuit,
unless
otherwise noted.) (Note 2)
PARAMETER
Minimum Programmable
t
ON_DELAY
Minimum Programmable
Turn-On Rise Time
Adaptive Tuning Time
OUTPUT VOLTAGE
Programmable Output Voltage
Range
LX Bias Current
Allowable Duty-Cycle Range
Regulation Set-Point
Accuracy (Note 3)
V
OUT
Sense Bias Current
DCR Sense Bias Current
PWM CLOCK (Note 3)
Switching-Frequency Range
Switching-Frequency Set-
Point Accuracy
External Clock to SYNC
Frequency Range
Minimum Allowable SYNC
Duty Cycle
Maximum Allowable SYNC
Duty Cycle
PROTECTION (Note 3)
Overcurrent Fault-Threshold
Accuracy
Output Overvoltage-Fault
Threshold
Output Undervoltage-Fault
Threshold
Thermal-Shutdown Threshold
Accuracy
Thermal-Shutdown Hysteresis
Power-Good Threshold
V
OUT
rising
V
OUT
falling
f
SW
Note 10
300
-5
f
SYNC
300
1000
+5
1000
kHz
%
kHz
%
%
I
OUTN
I
OUTP
V
OUT
I
LX
Measured from OUTP to OUTN
(Notes 4 and 10)
Not switching, current out of device pin
(Note 10)
V
OUT
> 0.8V, -40°C ≤ T
A
≤ +85°C
Current flowing into OUTP
Current flowing into DCR,
V
DCRP
- V
DCRN
= 150mV
V
OUT
≤ 0.8V, -40°C ≤ T
A
≤ +85°C
Current flowing out of OUTN
5
-1.26
-1.95
50
35
120
4
0.5
200
95
+1.26
+1.95
5.25
V
µA
%
%
µA
µA
nA
µA
SYMBOL
t
2
t3
t
4
CONDITIONS
(Figure 2, Note 10)
(Figure 2, Note 10)
From V
OUT
= V
OUT
command to assertion
of power good (PG) (Figure 2)
MIN
1
1
12
TYP
MAX
UNITS
ms
ms
ms
I
DCRN
I
DCRP
40
60
T
A
= +25°C, exclusive of sensor error
Output rising
Output falling
±3
115
85
±20
20
90
85
%
V
OUT
%
V
OUT
°C
°C
V
OUT
%
%
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Maxim Integrated │ 3
MAX15303
6A Digital PoL DC-DC Converter with
InTune Automatic Compensation
Electrical Characteristics (continued)
(All settings = factory default, V
PWR
= V
PVIN =
V
INSNS
= 12V, V
SGND
= V
DGND
= V
PGND
= 0V, V
OUT
= 1.2V, f
SW
= 600kHz.
Specifications are for T
A
= T
J
= -40°C to +85°C, typical values are at T
A
= T
J
= +25°C. See the
Typical Operating Circuit,
unless
otherwise noted.) (Note 2)
PARAMETER
STARTUP/SHUTDOWN TIMING
Firmware Initialization
Programmable TON_DELAY,
TOFF_DELAY Range
TON_DELAY, TOFF DELAY
Resolution
TON_DELAY, TOFF DELAY
Command Accuracy (Note 10)
TON_DELAY, TOFF DELAY
Timing Accuracy
Programmable TON_RISE,
TOFF_FALL Range
TON_RISE, TOFF_FALL
Resolution
TON_RISE, TOFF_FALL
Command Accuracy (Note 10)
TON_RISE, TOFF_FALL
Timing Accuracy
Adaptive Tuning Time
Temperature-Measurement
Accuracy
DIGITAL I/O
Power-Good Logic-High
Leakage Current
Output Logic-High
Output Logic-Low
Input Bias Current
Rise/Fall Slew Rate
EN, SYNC Input-Logic Low
Voltage
EN, SYNC Input-Logic High
Voltage
t
3
t
1
From V
IN
> V
UVLO(PWR)
, until ready to
enable (Figure 2)
Minimum delay (Figure 2)
t
2
Maximum delay (Figure 2)
Delay timing step size
Command value sent vs. read back
Command read-back value vs. actual
delay time
Minimum (Figure 2)
Maximum (Figure 2)
Ramp timing step size (varies with VOUT_
COMMAND)
Command value sent vs. read back
Command read back value vs. actual ramp
duration
t
4
From end of soft-start ramp to PG assertion
(varies with FREQUENCY_SWITCH
(Figure 2)
External
Internal
Open-drain output mode, open-drain
connected to 5.5V, V
3P3
= 3.3V
CMOS mode, I
SOURCE
= 4mA
I
SINK
= 4mA
C
LOAD
= 15pF
Input voltage falling
Input voltage rising
2
±10
12
±5
±5
10
V
3P3
-
0.4
-1
2
0.8
V
3P3
0.4
+1
±0.8
1
255 x
t
RR
0.4 -
1.0
±0.5
ms
25
1
ms
145
0.6
±0.3
ms
ms
ms
ms
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
t
RR
ms
ms
µs
ms
°C
µA
V
V
µA
ns
V
V
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Maxim Integrated │ 4
MAX15303
6A Digital PoL DC-DC Converter with
InTune Automatic Compensation
Electrical Characteristics (continued)
(All settings = factory default, V
PWR
= V
PVIN =
V
INSNS
= 12V, V
SGND
= V
DGND
= V
PGND
= 0V, V
OUT
= 1.2V, f
SW
= 600kHz.
Specifications are for T
A
= T
J
= -40°C to +85°C, typical values are at T
A
= T
J
= +25°C. See the
Typical Operating Circuit,
unless
otherwise noted.) (Note 2)
PARAMETER
EN, SYNC Input Leakage
Current
SMBus (Note 3)
SDA, SCL Input Logic-Low
Voltage
SDA, SCL Input Logic-High
Voltage
SDA, SCL,
SALRT
Logic-High
Leakage Current
SDA, SCL,
SALRT
Logic-Low
Output Voltage
PMBus Operating Frequency
Bus Free Time
(STOP - START)
START Condition Hold Time
from SCL
START Condition Setup Time
from SCL
STOP Condition Setup Time
from SCL
SDA Hold Time from SCL
SDA Setup Time from SCL
SCL Low Period
SCL High Period
Input voltage falling
Input voltage rising
V
SCL
, V
SDA
= 0V, and V
SALRT
tested at
0V and 3.3V
I
SINK
= 4mA
f
SMB
t
BUF
t
HD:STA
t
SU:STA
t
SU:STO
t
HD:DAT
t
SU:DAT
t
HIGH
t
LOW
1.3
0.6
0.6
0.6
300
100
1.3
0.6
Hysteresis = +20°C
150
400
2
10
0.4
0.8
V
V
µA
V
kHz
µs
µs
µs
µs
ns
ns
µs
µs
°C
SYMBOL
CONDITIONS
MIN
-10
TYP
MAX
+10
UNITS
µA
THERMAL PROTECTION
Gate-Driver Thermal-
T
SHDN
Shutdown Threshold
INTEGRATED SWITCHING MOSFETs
High-Side nMOS On-
RON
H
Resistance
Low-Side nMOS On-
RON
L
Resistance
Maximum Allowable High-
Side nMOS Average Current
Maximum Allowable Low-Side
nMOS Average Current
V
GDRV
Undervoltage Lockout
V
GDRV
Output
V
GDRV
40
20
V
OUT
= 1.8V
V
OUT
= 1.8V
GDRV falling
GDRV rising
I
LOAD
= 1mA to 100mA,
V
IN
= 6V to 14V
3.6
3.7
4.5
3.85
3.94
5.0
60
30
4.3
6.0
4.1
4.2
5.5
mΩ
mΩ
A
A
V
V
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Maxim Integrated │ 5
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