HIGH SPEED
2K x 8 DUAL PORT
STATIC RAM
◆
IDT7132SA/LA
IDT7142SA/LA
Features
◆
◆
High-speed access
– Commercial: 20/25/35/55/100ns (max.)
– Industrial: 25ns (max.)
– Military: 25/35/55/100ns (max.)
Low-power operation
– IDT7132/42SA
Active: 325mW (typ.)
Standby: 5mW (typ.)
– IDT7132/42LA
Active: 325mW (typ.)
Standby: 1mW (typ.)
◆
◆
◆
◆
◆
◆
◆
◆
MASTER IDT7132 easily expands data bus width to 16-or-more
bits using SLAVE IDT7142
On-chip port arbitration logic (IDT7132 only)
BUSY
output flag on IDT7132;
BUSY
input on IDT7142
Battery backup operation —2V data retention (LA only)
TTL-compatible, single 5V ±10% power supply
Available in 48-pin DIP, LCC and Flatpack, and 52-pin PLCC
packages
Military product compliant to MIL-PRF-38535 QML
Industrial temperature range (–40°C to +85°C) is available for
selected speeds
Green parts available, see ordering information
Functional Block Diagram
OE
L
CE
L
R/W
L
OE
R
CE
R
R/W
R
I/O
OL-
I/O
7L
I/O
Control
I/O
Control
I/O
OR-
I/O
7R
m
BUSY
L
(1,2)
A
10L
A
0L
Address
Decoder
11
BUSY
R
(1,2)
MEMORY
ARRAY
11
Address
Decoder
A
10R
A
0R
CE
L
OE
L
R/W
L
ARBITRATION
LOGIC
CE
R
OE
R
R/W
R
2692 drw 01
NOTES:
1. IDT7132 (MASTER):
BUSY
is open drain output and requires pullup resistor of 270Ω.
IDT7142 (SLAVE):
BUSY
is input.
2. Open drain output: requires pullup resistor of 270Ω.
NOVEMBER 2015
1
©2015 Integrated Device Technology, Inc.
DSC-2692/21
IDT7132SA/LA and IDT 7142SA/LA
High Speed 2K x 8 Dual Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Description
The IDT7132/IDT7142 are high-speed 2K x 8 Dual-Port Static RAMs.
The IDT7132 is designed to be used as a stand-alone 8-bit Dual-Port RAM
or as a “MASTER” Dual-Port RAM together with the IDT7142 “SLAVE”
Dual-Port in 16-bit-or-more word width systems. Using the IDT MASTER/
SLAVE Dual-Port RAM approach in 16-or-more-bit memory system
applications results in full-speed, error-free operation without the need for
additional discrete logic.
Both devices provide two independent ports with separate control,
address, and l/O pins that permit independent, asynchronous access for
reads or writes to any location in memory. An automatic power down
feature, controlled by
CE
permits the on-chip circuitry of each port to enter
a very low standby power mode.
Fabricated using CMOS high-performance technology, these
devices typically operate on only 325mW of power. Low-power (LA)
versions offer battery backup data retention capability, with each Dual-
Port typically consuming 200µW from a 2V battery.
The IDT7132/7142 devices are packaged in a 48-pin sidebraze or
plastic DIPs, 48-pin LCCs, 52-pin PLCCs, and 48-lead flatpacks.
Military grade product is manufactured in compliance with the latest
revision of MIL-PRF-38535 QML, making it ideally suited to military
temperature applications demanding the highest level of performance
and reliability.
Pin Configurations
(1,2,3)
NOTES:
1. All V
CC
pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. P48-1 package body is approximately .55 in x 2.43 in x .18 in.
C48-2 package body is approximately .62 in x 2.43 in x .15 in.
L48-1 package body is approximately .57 in x .57 in x .68 in.
F48-1 package body is approximately .75 in x .75 in x .11 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
Capacitance
(1)
(T
A
= +25°C,f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Conditions
(2)
V
IN
= 3dV
V
OUT
= 3dV
Max.
11
11
Unit
pF
pF
2692 tbl 00
NOTES:
1. This parameter is determined by device characterization but is not production
tested.
2. 3dV represents the interpolated capacitance when the input and output signals
switch from 3V to 0V.
2
IDT7132SA/LA and IDT 7142SA/LA
High Speed 2K x 8 Dual Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Pin Configurations
(1,2,3)
(con't.)
NOTES:
1. All V
CC
pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. Package body is approximately .75 in x .75 in x .17 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
Recommended Operating
Temperature and Supply Voltage
(1,2)
Grade
Ambient
Temperature
-55
O
C to+125
O
C
0
O
C to +70
O
C
-40
O
C to +85
O
C
GND
0V
0V
0V
Vcc
5.0V
+
10%
5.0V
+
10%
5.0V
+
10%
2692 tbl 02
Absolute Maximum Ratings
(1)
Symbol
V
TERM
(2)
Rating
Terminal Voltage
with Respect
to GND
Temperature
Under Bias
Storage
Temperature
DC Output
Current
Commercial
& Industrial
-0.5 to +7.0
Military
-0.5 to +7.0
Unit
V
Military
Commercial
Industrial
T
BIAS
T
STG
I
OUT
-55 to +125
-65 to +150
50
-65 to +135
-65 to +150
50
o
C
C
o
NOTES:
1. This is the parameter T
A
. This is the "instant on" case temperature.
2. Industrial temperature: for specific speeds, packages and powers contact your
sales office.
mA
2692 tbl 01
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational sections of the specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. VTERM must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns
maximum, and is limited to < 20mA for the period of V
TERM
> Vcc + 10%.
Recommended DC Operating
Conditions
Symbol
V
CC
GND
V
IH
V
IL
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
4.5
0
2.2
-0.5
(1)
Typ.
5.0
0
____
____
Max.
5.5
0
6.0
(2)
0.8
Unit
V
V
V
V
2692 tbl 03
NOTES:
1. V
IL
(min.) = -1.5V for pulse width less than 10ns.
2. V
TERM
must not exceed Vcc + 10%.
3
6.42
IDT7132SA/LA and IDT 7142SA/LA
High Speed 2K x 8 Dual Port Static RAM
Military, Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(1,5,8)
(V
CC
= 5.0V ± 10%)
7132X20
(2)
7142X20
(2)
Com'l Only
Symbol
I
CC
Parameter
Dynamic Operating Current
(Both Ports Active)
Test Condition
CE
L
=
CE
R
= V
IL
,
Outputs Disabled
f = f
MAX
(3)
Version
COM'L
MIL &
IND
COM'L
MIL &
IND
CE
"A"
= V
IL
and
CE
"B"
= V
IH
(6)
Active Port Outputs Disabled
f=f
MAX
(3)
COM'L
MIL &
IND
COM'L
MIL &
IND
CE
"A"
< 0.2V andCE
"B"
> V
CC
-0.2V
(6)
V
IN
> V
CC
- 0.2V or V
IN
< 0.2V
Active Port Outputs Disabled
f = f
MAX
(3)
COM'L
MIL &
IND
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
Typ.
110
110
____
____
7132X25
(7)
7142X25
(7)
Com'l, Ind
& Military
Typ.
110
110
110
110
30
30
30
30
65
65
65
65
1.0
0.2
1.0
0.2
60
60
60
60
Max.
220
170
280
220
65
45
80
60
150
115
160
125
15
5
30
10
145
105
155
115
7132X35
7142X35
Com'l &
Military
Typ.
80
80
80
80
25
25
25
25
50
50
50
50
1.0
0.2
1.0
0.2
45
45
45
45
Max.
165
120
230
170
65
45
80
60
125
90
150
115
15
4
30
10
110
85
145
105
2692 tbl 04a
Max.
250
200
____
____
Unit
mA
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
CE
L
=
CE
R
= V
IH
,
f = f
MAX
(3)
30
30
____
____
65
45
____
____
mA
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
65
65
____
____
165
125
____
____
mA
I
SB3
Full Standby Current (Both
Ports - All
CMOS Level Inputs)
CE
L
and
CE
R
> V
CC
-0.2V
V
IN
> V
CC
-0.2V or V
IN
< 0.2V, f = 0
(4)
1.0
0.2
____
____
15
5
____
____
mA
I
SB4
Full Standby Current
(One Port - All
CMOS Level Inputs)
60
60
____
____
155
115
____
____
mA
7132X55
7142X55
Com'l &
Military
Symbol
I
CC
Parameter
Dynamic Operating
Current
(Both Ports Active)
CE
L
=
CE
R
= V
IL
,
Outputs Disabled
f = f
MAX
(3)
Test Condition
Version
COM'L
MIL &
IND
COM'L
MIL &
IND
CE
"A"
= V
IL
and
CE
"B"
= V
IH
(6)
Active Port Outputs Disabled
f=f
MAX
(3)
COM'L
MIL &
IND
COM'L
MIL &
IND
CE
"A"
< 0.2V and
CE
"B"
> V
CC
-0.2V
(6)
V
IN
> V
CC
- 0.2V or V
IN
< 0.2V
Active Port Outputs Disabled
f = f
MAX
(3)
COM'L
MIL &
IND
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
SA
LA
Typ.
65
65
65
65
20
20
20
20
40
40
40
40
1.0
0.2
1.0
0.2
40
40
40
40
Max.
155
110
190
140
65
35
65
45
110
75
125
90
15
4
30
10
100
70
110
85
7132X100
7142X100
Com'l &
Military
Typ.
65
65
65
65
20
20
20
20
40
40
40
40
1.0
0.2
1.0
0.2
40
40
40
40
Max.
155
110
190
140
55
35
65
45
110
75
125
90
15
4
30
10
95
70
110
80
2692 tbl 04b
Unit
mA
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
CE
L
=
CE
R
= V
IH
,
f = f
MAX
(3)
mA
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
mA
I
SB3
Full Standby Current
(Both Ports - All
CMOS Level Inputs)
CE
L
and
CE
R
> V
CC
-0.2V
V
IN
> V
CC
-0.2V or V
IN
< 0.2V, f = 0
(4)
mA
I
SB4
Full Standby Current
(One Port - All
CMOS Level Inputs)
mA
NOTES:
1. 'X' in part numbers indicates power rating (SA or LA).
2. PLCC Package only
3. At f = f
Max
, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/t
RC
, and using “AC TEST CONDITIONS” of input levels
of GND to 3V.
4. f = 0 means no address or control lines change. Applies only to inputs at CMOS level standby.
5. Vcc = 5V, T
A
=+25°C for Typ and is not production tested. Vcc
DC
= 100mA (Typ)
6. Port "A" may be either left or right port. Port "B" is opposite from port "A".
7. Not available in DIP packages.
8. Industrial temperature: for specific speeds, packages and powers contact your sales office.
4
IDT7132SA/LA and IDT 7142SA/LA
High Speed 2K x 8 Dual Port Static RAM
Military, Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature Supply Voltage Range
(V
CC
= 5.0V ± 10%)
7132SA
7142SA
Symbol
|I
LI
|
|I
LO
|
V
OL
V
OL
V
OH
Parameter
Input Leakage Current
(1)
Output Leakage Current
Output Low Voltage
Open Drain Output
Low Voltage (BUSY)
Output High Voltage
Test Conditions
V
CC
= 5.5V,
V
IN
= 0V to V
CC
V
CC
= 5.5V,
CE
= V
IH
, V
OUT
= 0V to V
CC
I
OL
= 4mA
I
OL
= 16mA
I
OH
= -4mA
Min.
___
7132LA
7142LA
Min.
___
Max.
10
10
0.4
0.5
___
Max.
5
5
0.4
0.5
___
Unit
µA
___
___
µA
V
V
V
2692 tbl 05
___
___
___
___
2.4
2.4
NOTE:
1. At Vcc
<
2.0V leakages are undefined.
Data Retention Characteristics
(LA Version Only)
Symbol
V
DR
I
CCDR
Parameter
V
CC
for Data Retention
Data Retention Current
V
CC
= 2.0V
CE
> V
CC
-0.2V
V
IN
> V
CC
-0.2V or
t
CDR
(3)
t
R
(3)
Chip Deselect to Data Retention Time
Operation Recovery Time
V
IN
< 0.2V
Mil. & Ind.
Com'l.
Test Condition
Min.
2.0
___
___
Typ.
(1)
___
Max.
___
Unit
V
µA
µA
ns
ns
2692 tbl 06
100
100
___
___
4000
1500
___
___
0
t
RC
(2)
NOTES:
1. V
CC
= 2V, T
A
= +25°C, and is not production tested.
2. t
RC
= Read Cycle Time
3. This parameter is guaranteed but not production tested.
Data Retention Waveform
DATA RETENTION MODE
V
DR
≥
2.0V
V
CC
4.5V
t
CDR
4.5V
t
R
CE
V
IH
V
DR
V
IH
2692 drw 05
,
5
6.42
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
