19-1066; Rev 1; 11/09
+2.375V, Low-Power, 8-Channel,
Serial 12-Bit ADC
________________General Description
The MAX1245 12-bit data-acquisition system combines
an 8-channel multiplexer, high-bandwidth track/hold, and
serial interface with high conversion speed and ultra-low
power consumption. It operates from a single +2.375V to
+3.3V supply, and its analog inputs are software config-
urable for unipolar/bipolar and single-ended/differential
operation.
The 4-wire serial interface directly connects to SPI™,
QSPI™, and MICROWIRE™ devices without external
logic. A serial strobe output allows direct connection to
TMS320-family digital signal processors. The MAX1245
works with an external reference, and uses either the
internal clock or an external serial-interface clock to
perform successive-approximation analog-to-digital
conversions.
This device provides a hard-wired
SHDN
pin and a
software-selectable power-down, and can be pro-
grammed to automatically shut down at the end of a
conversion. Accessing the serial interface powers up
the MAX1245, and the quick turn-on time allows it to be
shut down between conversions. This technique can
cut supply current to under 10µA at reduced sampling
rates.
The MAX1245 is available in a 20-pin DIP package and
an SSOP that occupies 30% less area than an 8-pin DIP.
For supply voltages from +2.7V to +5.25V, use the pin-
compatible MAX147.
____________________________Features
o
Single +2.375V to +3.3V Operation
o
8-Channel Single-Ended or 4-Channel
Differential Analog Inputs
o
Low Power: 0.8mA (100ksps)
10µA (1ksps)
1µA (power-down mode)
o
Internal Track/Hold, 100kHz Sampling Rate
o
SPI/QSPI/MICROWIRE/TMS320-Compatible
4-Wire Serial Interface
o
Software-Configurable Unipolar or Bipolar Inputs
o
20-Pin DIP/SSOP Packages
MAX1245
________________Ordering Information
PART*
MAX1245ACPP
MAX1245BCPP
MAX1245ACAP
MAX1245BCAP
MAX1245AEPP
MAX1245BEPP
MAX1245AEAP
MAX1245BEAP
TEMP RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
20 Plastic DIP
20 Plastic DIP
20 SSOP
20 SSOP
20 Plastic DIP
20 Plastic DIP
20 SSOP
20 SSOP
INL
(LSB)
±1/2
±1
±1/2
±1
±1/2
±1
±1/2
±1
________________________Applications
Portable Data Logging
Battery-Powered Instruments
Medical Instruments
Data Acquisition
*Contact
factory for availability of alternate surface-mount packages.
___________________Pin Configuration
TOP VIEW
CH0 1
20 V
DD
19 SCLK
18 CS
___________Typical Operating Circuit
+2.5V
0V to
+2.048V
ANALOG
INPUTS
CH0
V
DD
0.1µF
DGND
AGND
COM
V
DD
CH1 2
CH2 3
CH3 4
CH4 5
MAX1245
17 DIN
16 SSTRB
15 DOUT
14 DGND
13 AGND
12 V
DD
11 VREF
CH7
CPU
MAX1245
CS
SCLK
DIN
DOUT
SSTRB
SHDN
I/O
SCK (SK)
MOSI (SO)
MISO (SI)
V
SS
CH5 6
CH6 7
CH7 8
COM 9
SHDN 10
+2.048V
0.1µF
VREF
DIP/SSOP
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
+2.375V, Low-Power, 8-Channel,
Serial 12-Bit ADC
MAX1245
ABSOLUTE MAXIMUM RATINGS
V
DD
to AGND, DGND .............................................. -0.3V to +6V
AGND to DGND.................................................... -0.3V to +0.3V
CH0–CH7, COM to AGND, DGND ............ -0.3V to (V
DD
+ 0.3V)
VREF to AGND........................................... -0.3V to (V
DD
+ 0.3V)
Digital Inputs to DGND............................................ -0.3V to +6V
Digital Outputs to DGND ........................... -0.3V to (V
DD
+ 0.3V)
Digital Output Sink Current .................................................25mA
Continuous Power Dissipation (T
A
= +70°C)
Plastic DIP (derate 11.11mW/°C above +70°C) ......... 889mW
SSOP (derate 8.00mW/°C above +70°C) ................... 640mW
CERDIP (derate 11.11mW/°C above +70°C) .............. 889mW
Operating Temperature Ranges
MAX1245_C_P ................................................... 0°C to +70°C
MAX1245_E_P ................................................ -40°C to +85°C
Storage Temperature Range ............................ -60°C to +150°C
Lead Temperature (soldering, 10sec) ............................ +300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= +2.375V to +3.3V, V
COM
= 0V, f
CLK
= 1.5MHz, external clock (50% duty cycle), 15 clocks/conversion cycle (100ksps),
VREF = 2.048V applied to VREF pin, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
DC ACCURACY
(Note 1)
Resolution
Relative Accuracy (Note 2)
Differential Nonlinearity
Offset Error
Gain Error (Note 3)
Gain Temperature Coefficient
Channel-to-Channel Offset
Matching
INL
DNL
MAX1245A
MAX1245B
No missing codes over temperature
±0.5
±0.5
±0.25
±0.2
SYMBOL
CONDITIONS
MIN
12
±0.5
±1.0
±1
±4
±4
TYP
MAX
UNITS
Bits
LSB
LSB
LSB
LSB
ppm/°C
LSB
DYNAMIC SPECIFICATIONS
(10kHz sine-wave input, 0Vp-p to 2.048Vp-p, 100ksps, 1.5MHz external clock, bipolar input mode)
Signal-to-Noise + Distortion Ratio
SINAD
68
dB
Total Harmonic Distortion
Spurious-Free Dynamic Range
Channel-to-Channel Crosstalk
Small-Signal Bandwidth
Full-Power Bandwidth
CONVERSION RATE
Internal clock,
SHDN
= open
Conversion Time (Note 5)
Track/Hold Acquisition Time
Aperture Delay
Aperture Jitter
Internal Clock Frequency
External Clock Frequency
SHDN
= open
SHDN
= V
DD
0.1
Data transfer only
0
t
CONV
t
ACQ
Internal clock,
SHDN
= V
DD
External clock = 1.5MHz, 12 clocks/conversion
External clock = 1.5MHz
40
<50
1.5
0.225
1.5
1.5
5.5
35
8
2.0
µs
ns
ps
MHz
MHz
7.5
65
µs
THD
SFDR
50kHz, 2V
p-p
(Note 4)
-3dB rolloff
Up to the 5th harmonic
76
-85
2.25
1.0
-76
dB
dB
dB
MHz
MHz
2
_______________________________________________________________________________________
+2.375V, Low-Power, 8-Channel,
Serial 12-Bit ADC
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +2.375V to +3.3V, V
COM
= 0V, f
CLK
= 1.5MHz, external clock (50% duty cycle), 15 clocks/conversion cycle (100ksps),
VREF = 2.048V applied to VREF pin, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
ANALOG/COM INPUTS
Input Voltage Range, Single-
Ended and Differential (Note 6)
Multiplexer Leakage Current
Input Capacitance
EXTERNAL REFERENCE
VREF Input Voltage Range
(Note 8)
VREF Input Current
VREF Input Resistance
Shutdown VREF Input Current
DIGITAL INPUTS
(DIN, SCLK,
CS, SHDN)
V
INH
DIN, SCLK,
CS
Input High Voltage
DIN, SCLK,
CS
Input Low Voltage
DIN, SCLK,
CS
Input Hysteresis
DIN, SCLK,
CS
Input Leakage
DIN, SCLK,
CS
Input Capacitance
SHDN
Input High Voltage
SHDN
Input Low Voltage
SHDN
Input Current
SHDN
Input Mid Voltage
SHDN
Voltage, Open
SHDN
Maximum Allowed Leakage,
Mid Input
DIGITAL OUTPUTS
(DOUT, SSTRB)
Output Voltage Low
Output Voltage High
Three-State Leakage Current
Three-State Output Capacitance
POWER REQUIREMENTS
Positive Supply Voltage
Positive Supply Current
Supply Rejection (Note 9)
V
OL
V
OH
I
L
C
OUT
V
DD
I
DD
PSR
Operating mode, full-scale input
Power-down
V
DD
= 2.375V to 3.3V, full-scale input,
external reference = 2.048V
I
SINK
= 5mA
I
SINK
= 16mA
I
SOURCE
=0.5mA
CS
= V
DD
CS
= V
DD
(Note 7)
2.375
0.8
1.2
±0.3
V
DD
- 0.375
±0.01
±10
15
3.3
1.3
10
0.5
0.4
V
V
µA
pF
V
mA
µA
mV
V
INL
V
HYST
I
IN
C
IN
V
INH
V
INL
I
IN
V
IM
V
FLT
SHDN
= open
SHDN
= open
SHDN
= 0V or V
DD
V
DD
/2
- 0.3
V
DD
/2
±80
V
IN
= 0V or V
DD
(Note 7)
V
DD
- 0.4
0.4
±4.0
V
DD
/2
+ 0.3
0.2
±0.01
±1
15
2.0
0.8
VREF = 2.048V
18
1.0
82
25
0.01
10
V
DD
+
50mV
120
V
µA
kΩ
µA
V
V
V
µA
pF
V
V
µA
V
V
nA
Unipolar, V
COM
= 0V
Bipolar, V
COM
= VREF/2
On/off leakage current, V
IN
= 0V or V
DD
(Note 7)
±0.01
16
0 to VREF
±VREF/2
±1
V
µA
pF
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX1245
_______________________________________________________________________________________
3
+2.375V, Low-Power, 8-Channel,
Serial 12-Bit ADC
MAX1245
TIMING CHARACTERISTICS
(V
DD
= +2.375V to +3.3V, V
COM
= 0V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
Acquisition Time
DIN to SCLK Setup
DIN to SCLK Hold
SCLK Fall to Output Data Valid
CS
Fall to Output Enable
CS
Rise to Output Disable
CS
to SCLK Rise Setup
CS
to SCLK Rise Hold
SCLK Pulse Width High
SCLK Pulse Width Low
SCLK Fall to SSTRB
CS
Fall to SSTRB Output Enable
CS
Rise to SSTRB Output Disable
SSTRB Rise to SCLK Rise
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
SYMBOL
t
ACQ
t
DS
t
DH
t
DO
t
DV
t
TR
t
CSS
t
CSH
t
CH
t
CL
t
SSTRB
t
SDV
t
STR
t
SCK
Figure 1
External clock mode only, Figure 1
External clock mode only, Figure 2
Internal clock mode only (Note 7)
0
Figure 1
Figure 1
Figure 2
200
0
300
300
260
240
400
20
CONDITIONS
MIN
2.0
200
0
260
240
400
TYP
MAX
UNITS
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Tested at V
DD
= +2.375V; V
COM
= 0V; unipolar single-ended input mode.
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
External reference (VREF = +2.048V), offset nulled.
Ground “on” channel; sine wave applied to all “off” channels.
Conversion time defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
The common-mode range for the analog inputs is from AGND to V
DD
.
Guaranteed by design. Not subject to production testing.
ADC performance is limited by the converter’s noise floor, typically 300µVp-p.
Measured as
|
V
FS
(2.375V) - V
FS
(3.3V)
|
.
__________________________________________Typical Operating Characteristics
(V
DD
= 2.5V, VREF = 2.048V, f
CLK
= 1.5MHz, C
LOAD
= 20pF, T
A
= +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX1245-01
SUPPLY CURRENT
vs. TEMPERATURE
R
L
=
∞
CODE = 101010100000
MAX1245-02
INTEGRAL NONLINEARITY
vs. SUPPLY VOLTAGE
0.45
0.40
0.35
INL (LSB)
MAX1245-03
1.25
0.90
0.50
R
L
=
∞
CODE = 101010100000
0.85
1.00
I
DD
(mA)
C
LOAD
= 50pF
I
DD
(mA)
0.80
0.30
0.25
0.20
0.15
0.75
C
LOAD
= 20pF
0.75
0.70
0.10
0.05
0.50
2.375
2.625
2.875
V
DD
(V)
3.125
3.375
0.65
-55
-30
-5
20 45 70 95
TEMPERATURE (°C)
120 145
0.00
2.375
2.625
2.875
V
DD
(V)
3.125
3.375
4
_______________________________________________________________________________________
+2.375V, Low-Power, 8-Channel,
Serial 12-Bit ADC
____________________________Typical Operating Characteristics (continued)
(V
DD
= 2.5V, VREF = 2.048V, f
CLK
= 1.5MHz, C
LOAD
= 20pF, T
A
= +25°C, unless otherwise noted.)
MAX1245
INTEGRAL NONLINEARITY
vs. TEMPERATURE
0.45
0.40
0.35
OFFSET (LSB)
INL (LSB)
0.30
0.25
0.20
0.15
0.10
0.05
0
-55
-30
-5
20 45 70 95
TEMPERATURE (˚C)
120 145
V
DD
= 2.375V
MAX1245-04
OFFSET vs. SUPPLY VOLTAGE
MAX1245-05
OFFSET vs. TEMPERATURE
0.45
0.40
0.35
OFFSET (LSB)
0.30
0.25
0.20
0.15
0.10
0.05
MAX1245-06
0.50
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
2.375
2.625
2.875
V
DD
(V)
3.125
0.50
3.375
0
-55
-30
-5
20
45
70
95
120 145
TEMPERATURE (˚C)
CHANNEL-TO-CHANNEL OFFSET MATCHING
vs. SUPPLY VOLTAGE
MAX1245-07
CHANNEL-TO-CHANNEL OFFSET MATCHING
vs. TEMPERATURE
MAX1245-08
GAIN ERROR
vs. SUPPLY VOLTAGE
0.45
0.40
GAIN ERROR (LSB)
0.35
0.30
0.25
0.20
0.15
0.10
0.05
MAX1245-09
0.50
0.45
OFFSET MATCHING (LSB)
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
2.375
2.625
2.875
V
DD
(V)
3.125
0.50
0.45
OFFSET MATCHING (LSB)
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.50
3.375
0
-55
-30
-5
70 95
TEMPERATURE (˚C)
45
20
120 145
0
2.375
2.625
2.875
V
DD
(V)
3.125
3.375
GAIN ERROR
vs. TEMPERATURE
MAX1245-10
CHANNEL-TO-CHANNEL GAIN MATCHING
vs. SUPPLY VOLTAGE
MAX1245-11
CHANNEL-TO-CHANNEL GAIN MATCHING
vs. TEMPERATURE
0.45
0.40
GAIN MATCHING (LSB)
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
MAX1245-12
0.50
0.45
0.40
0.50
0.45
0.40
GAIN MATCHING (LSB)
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.50
GAIN ERROR (LSB)
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
-55
-30
-5
20
45
70
95
120 145
TEMPERATURE (˚C)
0
2.375
2.625
2.875
V
DD
(V)
3.125
3.375
-55
-30
-5
20 45 70 95
TEMPERATURE (˚C)
120 145
_______________________________________________________________________________________
5
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
