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74LVC1G74GT115: 产品描述Flip Flops SINGL D F/F POS EDGE PICOGATE; 产品类别半导体逻辑; 文件大小829KB，共25页; 制造商NXP(恩智浦); 官网地址https://www.nxp.com

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74LVC1G74GT115概述

Flip Flops SINGL D F/F POS EDGE PICOGATE

74LVC1G74GT115规格参数

参数名称	属性值
Product Attribute	Attribute Value
制造商 Manufacturer	NXP(恩智浦)
产品种类 Product Category	Flip Flops
RoHS	Details
Number of Circuits	1
Logic Family	74LVC
Logic Type	D-Type Flip-Flop
Polarity	Inverting/Non-Inverting
Input Type	Single-Ended
传播延迟时间 Propagation Delay Time	4.1 ns
High Level Output Current	- 32 mA
电源电压-最小 Supply Voltage - Min	1.65 V
电源电压-最大 Supply Voltage - Max	5.5 V
最小工作温度 Minimum Operating Temperature	- 40 C
最大工作温度 Maximum Operating Temperature	+ 125 C
安装风格 Mounting Style	SMD/SMT
封装 / 箱体 Package / Case	SOT-833
系列 Packaging	Cut Tape
系列 Packaging	MouseReel
系列 Packaging	Reel
高度 Height	0.46 mm
长度 Length	1.95 mm
Quiescent Current	100 nA
宽度 Width	1 mm
Number of Input Lines	4
Number of Output Lines	2
NumOfPackaging	3
工作电源电压 Operating Supply Voltage	1.65 V to 5.5 V
Reset Type	Set, Reset
工厂包装数量 Factory Pack Quantity	5000

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74LVC1G74

Single D-type flip-flop with set and reset; positive edge trigger

Rev. 13 — 5 December 2016

Product data sheet

1. General description

The 74LVC1G74 is a single positive edge triggered D-type flip-flop with individual data (D)

inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q

outputs.

This device is fully specified for partial power-down applications using I

OFF

. The I

OFF

circuitry disables the output, preventing damaging backflow current through the device

when it is powered down.

The set and reset are asynchronous active LOW inputs and operate independently of the

clock input. Information on the data input is transferred to the Q output on the

LOW-to-HIGH transition of the clock pulse. The D inputs must be stable one set-up time

prior to the LOW-to-HIGH clock transition for predictable operation.

Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and

fall times.

2. Features and benefits



Wide supply voltage range from 1.65 V to 5.5 V

5 V tolerant inputs for interfacing with 5 V logic

High noise immunity

Complies with JEDEC standard:



JESD8-7 (1.65 V to 1.95 V)



JESD8-5 (2.3 V to 2.7 V)



JESD8-B/JESD36 (2.7 V to 3.6 V)

ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-A exceeds 200 V

24

mA output drive (V

= 3.0 V)

CMOS low power consumption

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Inputs accept voltages up to 5 V

Multiple package options

Specified from

40 C

to +85

C

and

40 C

to +125

C



74LVC1G74GT115相似产品对比

	74LVC1G74GT115	74LVC1G74GM	74LVC1G74DC	74LVC1G74DP
描述	Flip Flops SINGL D F/F POS EDGE PICOGATE	Flip Flops	Flip Flops	Flip Flops
是否Rohs认证	-	符合	符合	符合
厂商名称	-	NXP(恩智浦)	NXP(恩智浦)	NXP(恩智浦)
零件包装代码	-	QFN	TSSOP	SOIC
包装说明	-	VQCCN, SOLCC8,.08,20	VSSOP, TSSOP8,.12,20	3 MM WIDTH, 0.50 MM LENGTH, PLASTIC, SOT505-2, TSSOP-8
针数	-	8	8	8
Reach Compliance Code	-	compliant	compliant	compliant
系列	-	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 代码	-	S-PQCC-N8	R-PDSO-G8	S-PDSO-G8
JESD-609代码	-	e4	e4	e4
长度	-	1.6 mm	2.3 mm	3 mm
逻辑集成电路类型	-	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP
最大频率@ Nom-Sup	-	175000000 Hz	175000000 Hz	175000000 Hz
最大I（ol）	-	0.024 A	0.024 A	0.024 A
湿度敏感等级	-	1	1	1
位数	-	1	1	1
功能数量	-	1	1	1
端子数量	-	8	8	8
最高工作温度	-	125 °C	125 °C	125 °C
最低工作温度	-	-40 °C	-40 °C	-40 °C
输出极性	-	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY
封装主体材料	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	-	VQCCN	VSSOP	TSSOP
封装等效代码	-	SOLCC8,.08,20	TSSOP8,.12,20	TSSOP8,.16
封装形状	-	SQUARE	RECTANGULAR	SQUARE
封装形式	-	CHIP CARRIER, VERY THIN PROFILE	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法	-	TAPE AND REEL	TAPE AND REEL	TAPE AND REEL
峰值回流温度（摄氏度）	-	260	260	260
电源	-	3.3 V	3.3 V	3.3 V
Prop。Delay @ Nom-Sup	-	5.9 ns	5.9 ns	5.9 ns
传播延迟（tpd）	-	13.4 ns	13.4 ns	13.4 ns
认证状态	-	Not Qualified	Not Qualified	Not Qualified
座面最大高度	-	0.5 mm	1 mm	1.1 mm
最大供电电压 (Vsup)	-	5.5 V	5.5 V	5.5 V
最小供电电压 (Vsup)	-	1.65 V	1.65 V	1.65 V
标称供电电压 (Vsup)	-	1.8 V	1.8 V	1.8 V
表面贴装	-	YES	YES	YES
技术	-	CMOS	CMOS	CMOS
温度等级	-	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
端子面层	-	NICKEL PALLADIUM GOLD	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD
端子形式	-	NO LEAD	GULL WING	GULL WING
端子节距	-	0.5 mm	0.5 mm	0.65 mm
端子位置	-	QUAD	DUAL	DUAL
处于峰值回流温度下的最长时间	-	30	30	30
触发器类型	-	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
宽度	-	1.6 mm	2 mm	3 mm
最小 fmax	-	200 MHz	200 MHz	200 MHz

74LVC1G74GT115

74LVC1G74GT115在线购买

74LVC1G74GT115概述

74LVC1G74GT115规格参数

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74LVC1G74GT115相似产品对比

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