POWER
Data Sheet
PTH12040
275 Watts
Single
12 Vin Single Output
Total Power:
# of Outputs:
SPECIAL FEATURES
50 A output current
12 V input voltage (8 - 14 Vdc)
Wide-output voltage adjust:
0.8 - 5.5 Vdc
Auto-track
™
sequencing*
Margin up/down controls
Efficiencies up to 96%
Output ON/OFF inhibit
Differential remote sense
Programmable UnderVoltage
Lockout (UVLO)
Point-of-Load-Alliance (POLA)
compatible
RoHS compliant
Two year warranty
Electrical Specifications
Input
Input voltage range
Input current
Remote ON/OFF
Start-up time
Undervoltage lockout
Track input voltage
(See Note 8)
Pin 18 (See Note 7 )
(See Note 3)
(See Note 2)
(See Note 1)
8 - 14Vdc
35 mA typical
Positive logic
1 V/ms
6.6 - 7.5 V typical
-0.13 mA
Output
Voltage adjustability
Setpoint accuracy
Line regulation
Load regulation
Total regulation
Minimum load
Ripple and noise
Transient response
Margin adjustment
20 MHz bandwidth
(See Note 4)
(See Note 7)
(See Note 1)
(See Note 1)
0.8 - 5.5 Vdc
±2.0% Vo
±5 mV typical
±5 mV typical
±3.0% Vo
0A
15 mV typical
70
μs recovery time
Overshoot/undershoot 150 mV
SAFETY
UL/cUL CAN/CSA-C22.2 No.
60950-1-03/UL 60950-1, File No.
E174104
TÜV Product Service (EN60950)
Certificate No B 04 06 38572 044
CB Report and Certificate to
IEC60950, Certificate No.
US/8292/UL
±5.0% Vo
All specifications are typical at nominal input, full load at 25 °C unless otherwise stated.
Cin = 1000 μF, Cout = 660 μF.
*Auto-track is a trademark of Texas Instruments.
PTH12040 Data Sheet
General Specifications
Efficiency
Insulation voltage
Switching frequency
Approvals and
standards
Material flammability
Dimensions
Weight
MTBF
Telcordia SR-332
LxWxH
See Efficiency Table
Non-isolated
1.05 MHz
EN60950, UL/cUL60950
UL94V-0
51.94 x 26.54 x 9.07 mm
2.045 x 1.045 x 0.357 in
17 g (0.60 oz)
2,500,000 hours
EMC Characteristics
Electrostatic discharge
Conducted immunity
Radiated immunity
EN61000-4-2, IEC801-2
EN61000-4-6
EN61000-4-3
Environmental Specifications
Thermal performance
(See Note 2)
MSL (‘Z’ suffix only)
Protection
Short-circuit
Thermal
Auto reset
95 A typical
Auto recovery
Operating ambient temperature
Non-operating temperature
JEDEC J-STD-020C
-40 °C to +85 °C
-40 °C to +125 °C
Level 3
Ordering Information
Model
Number
(9)
Output Power
(Max.)
Input
Voltage
Output
Voltage
Output Current
(Min.)
Output Current
(Max.)
Efficiency
(Typical)
Regulation
Line
Load
PTH12030W
275 W
8 - 14 Vdc
0.8 - 5.5 Vdc
0A
50 A
96%
±5 mV
±5 mV
Part Number System with Options
Product Family
Input Voltage
Output Current
Mechanical
Package
Output Voltage
Code
Pin Option
(8)
Mounting Options
PTH
Point-of-Load
Alliance compatible
12
12 = 12 V
04
04 = 50 A
0
Always 0
W
W = Wide
A
S
D = Horizontal through-
hole (RoHS 6/6)
Z = Surface-mount
solder ball (RoHS 6/6)
Output Voltage Adjustment
The ultra-wide output voltage trim range offers major advantages to users who
select the PTH12040W. It is no longer necessary to purchase a variety of
modules in order to cover different output voltages. The output voltage can be
trimmed in a range of 0.8 Vdc to 1.8 Vdc. When the PTH12040W converter
leaves the factory the output has been adjusted to the default voltage of 0.8 V.
Notes:
1. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit
is unconditionally met if RSET has a tolerance of 1% with 100 ppm/˚C or better temperature
stability.
2. This control pin has an internal pull-up to 5 V nominal. If it is left open-circuit the module will
operate when input power is applied. A small low leakage (<100 nA) MOSFET is recommended
for control. For further information, consult the related application note. For further information,
consult Application Note 193.
3. A 1000 μF input capacitor is required for proper operation. The capacitor must be rated for a
minimum of 300 mA rms of ripple current.
4. This is with a 1 A/μs loadstep, 50 to 100% Iomax, Io = 680 μF.
Efficiency Table: PTH12040W (Io = 35 A)
Output Voltage
Vo = 5.0 V
Vo = 3.3 V
Vo = 2.5 V
Vo = 2.0V
Vo = 1.8 V
Vo = 1.5 V
Vo = 1.2 V
Vo = 1.0 V
Vo = 0.8 V
Efficiency
96%
95%
93%
92%
91%
90%
88%
86%
82%
5. See Figures 1 and 2 for safe operating curves.
6. When the set-point voltage is adjusted higher than 3.6 V, a 10 V minimum input voltage is
recommended.
7. A small low-leakage (<100 nA) MOSFET is recommended to control this pin. The open circuit
voltage is less than 1 Vdc.
8. These are the default voltages. They may be adjusted using the ‘UVLO Prog’ control input.
Consult Application Note No. 193 for further information.
9. NOTICE: Some models do not support all options. Please contact your local Artesyn
representative or use the on-line model number search tool at http://www.artesyn.com/power
to find a suitable alternative.
PTH12040 Data Sheet
Characteristic Data
90
TEMPERATURE (ºC)
70
60
50
40
30
20
0
10
20
30
40
50
OUTPUT CURRENT (A)
Figure 1 - Safe Operating Area
Vin = 12 V, Output Voltage = 3.3 V (See Note A)
Nat conv
100 LFM
200 LFM
400 LFM
TEMPERATURE (ºC)
80
90
80
70
60
50
40
30
20
10
0
0
10
20
30
40
50
Nat conv
100 LFM
200 LFM
400 LFM
OUTPUT CURRENT (A)
Figure 2 - Safe Operating Area
Vin = 12 V, Output Voltage = 1.2 V (See Note A)
19
20
Margin
Down
18
Track
+Sense
11
9
100
EFFICIENC Y (%)
90
80
70
60
50
40
0
10
20
30
40
50
Vin
2
4
6
8
Margin
up
Vin
Vo
12
15
Vo
Vout
5.0V
3.3V
2.5V
1.8V
1.2V
0.8V
Ci
560uF
(Required)
UVLO
Inhibit
7
1
GND
3
5
10
GND
13
16
-Sense
Vo Adj
17
14
Rset
1%
0.05W
Co2
330u F
Co1
330uF
OUTPUT CURRENT (A)
Figure 3 - E ciency vs Load Current
Vin = 12 V (See Note B)
Figure 4 - Standard Application
Notes:
A. SOA curves represent the conditions at which internal components are within the Artesyn derating guidelines.
B. Characteristic data has been developed from actual products tested at 25 °C. This data is considered typical data for the converter.
PTH12040 Data Sheet
Mechanical Drawings
Plated through-hole
2.045 (51.94)
0.060 (1.52)
0.125 (3.17)
6 Places
0.060
(1.52)
17
0.125
(3.17)
3 Places
16
15 14 13
0.375
(9.52)
0.375
(9.52)
1.875 (47.62)
0.375
(9.52)
0.140
(3.55 )
ø0.040 (1.02)
20 Places
18
19
20
1.045
(26.54)
12 11 10
9
8
Lowest
Component
0.010 MIN .
(0.25 )
Bottom side
Clearance
Pin Assignments
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Function
Ground
Vin
Ground
Vin
Ground
Vin
Inhibit*
UVLO Programming
Vout
Ground
Vs+
Vout
Ground
Vs-
Vout
Ground
Adjust
Track
Margin up*
Margin down*
0.925
(23.49)
1
0.375
(9.52)
2
3
4
5
6
7
0.125 (3.17)
0.25 0
(6.35 )
2 Places
0.375
(9.52)
Host Board
0.357 (9.07)
MAX.
SIDE VIEW
0.375
(9.52)
Dimensions in Inches (mm)
Tolerances (unless otherwise speci ed)
2 Places 0.030 (0.76)
3 Places 0.010 (0.25 )
TOP VIEW
Surface-mount
2.045 (51.94)
0.060 (1.52)
0.125 (3.17)
6 Places
0.060
(1.52)
17
0.125
(3.17)
3 Places
16
15 14 13
0.375
(9.52)
0.375
(9.52)
1.875 (47.62)
0.375
(9.52)
0.370 (9.40)
MAX.
After solder re o w
on customer boar d
*Denotes negative logic:
Open = Normal operation
Ground = Function active
12 11 10
18
19
20
9
8
0.925
(23.49)
1.045
(26.54)
Solder Ball
ø
0.040 (1.02)
20 Places
1
0.375
(9.52)
2
3
4
5
6
7
0.25 0
(6.35 )
2 Places
0.375
(9.52)
0.125 (3.17)
0.375
(9.52)
SIDE VIEW
Dimensions in Inches (mm)
Tolerances (unless otherwise speci ed)
2 Places 0.030 (0.76)
3 Places 0.010 (0.25 )
TOP VIEW
WORLDWIDE OFFICES
Americas
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Hong Kong
+852 2176 3333
www.artesyn.com
For more information:
www.artesyn.com/power
For support:
productsupport.ep@artesyn.com
PTH12040 29Jun2015
While every precaution has been taken to ensure accuracy and completeness in this literature, Artesyn
Embedded Technologies assumes no responsibility, and disclaims all liability for damages resulting from use
of this information or for any errors or omissions. Artesyn Embedded Technologies, Artesyn and the Artesyn
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owners. © 2015 Artesyn Embedded Technologies, Inc.
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