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74LCX540MSA

产品描述Buffers & Line Drivers Octal Buff/Line Drv
产品类别逻辑    逻辑   
文件大小746KB,共15页
制造商Fairchild
官网地址http://www.fairchildsemi.com/
标准
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74LCX540MSA概述

Buffers & Line Drivers Octal Buff/Line Drv

74LCX540MSA规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称Fairchild
零件包装代码SSOP
包装说明SSOP, SSOP20,.3
针数20
Reach Compliance Codecompliant
其他特性WITH DUAL OUTPUT ENABLE
控制类型ENABLE LOW
系列LVC/LCX/Z
JESD-30 代码R-PDSO-G20
JESD-609代码e3
长度7.2 mm
负载电容(CL)50 pF
逻辑集成电路类型BUS DRIVER
最大I(ol)0.024 A
湿度敏感等级1
位数8
功能数量1
端口数量2
端子数量20
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性INVERTED
封装主体材料PLASTIC/EPOXY
封装代码SSOP
封装等效代码SSOP20,.3
封装形状RECTANGULAR
封装形式SMALL OUTLINE, SHRINK PITCH
包装方法RAIL
峰值回流温度(摄氏度)260
电源3.3 V
Prop。Delay @ Nom-Sup6.5 ns
传播延迟(tpd)7.8 ns
认证状态Not Qualified
座面最大高度2 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)2 V
标称供电电压 (Vsup)2.5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Matte Tin (Sn)
端子形式GULL WING
端子节距0.65 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度5.3 mm
Base Number Matches1

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74LCX540 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
December 2013
74LCX540
Low Voltage Octal Buffer/Line Driver
with 5V Tolerant Inputs and Outputs
Features
5V tolerant input and outputs
2.3V–3.6V V
CC
specifications provided
6.5ns t
PD
max. (V
CC
=
3.3V), 10µA I
CC
max.
Power down high impedance inputs and outputs
Supports live insertion/withdrawal
(1)
Implements p
roprietary
noise/ EMI reduction circuitry
Latch-up performance exceeds JEDEC 78 conditions
ESD performance
General Description
The LCX540 is an octal buffer/line driver designed to be
employed as a memory and address driver, clock driver
and bus oriented transmitter/receiver.
This device is similar in function to the LCX240 while
providing flow-through architecture (inputs on opposite
side from outputs). This pinout arrangement makes this
device especially useful as an output port for micropro-
cessors, allowing ease of layout and greater PC board
density.
The LCX540 is designed for low voltage (2.5V or 3.3V)
V
CC
applications with capability of interfacing to a 5V
signal environment. The LCX540 is fabricated with an
advanced CMOS technology to achieve high speed
operation while maintaining CMOS low power dissipa-
tion.
– Human body model
>
2000V
– Machine model
>
200V
Leadless DQFN package
Note:
1. To ensure the high impedance state during power up
or down, OE should be tied to V
CC
through a pull-up
resistor: the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
Ordering Information
Order Number
74LCX540WM
74LCX540SJ
74LCX540BQX
(2)
74LCX540MSA
74LCX540MTC
Package
Number
M20B
M20D
MLP20B
MSA20
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN),
JEDEC MO-241, 2.5 x 4.5mm
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Note:
2. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1995 Fairchild Semiconductor Corporation
74LCX540 Rev. 1.7.1
www.fairchildsemi.com

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