IRFBC30AS, SiHFBC30AS, IRFBC30AL, SiHFBC30AL
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
V
DS
(V)
R
DS(on)
()
Q
g
(Max.) (nC)
Q
gs
(nC)
Q
gd
(nC)
Configuration
V
GS
= 10 V
23
5.4
11
Single
D
FEATURES
600
2.2
I
2
PAK (TO-262)
D
2
PAK (TO-263)
•
Halogen-free According to IEC 61249-2-21
Definition
• Low Gate Charge Q
g
Results in Simple Drive
Requirement
• Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
• Fully Characterized Capacitance and Avalanche Voltage
and Current
• Effective C
oss
Specified
• Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
G
D
S
S
N-Channel MOSFET
G
• Switch Mode Power Supply (SMPS)
• Uninterruptible Power Supply
• High Speed Power Switching
TYPICAL SMPS TOPOLOGIES
• Single Transistor Flyback
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
Note
a. See device orientation.
D
2
PAK (TO-263)
SiHFBC30AS-GE3
IRFBC30ASPbF
SiHFBC30AS-E3
D
2
PAK (TO-263)
SiHFBC30ASTRL-GE3
a
IRFBC30ASTRLPbF
a
SiHFBC30ASTL-E3
a
D
2
PAK (TO-263)
SiHFBC30ASTRR-GE3
a
IRFBC30ASTRRPbF
a
SiHFBC30ASTR-E3
a
I
2
PAK (TO-262)
SiHFBC30AL-GE3
IRFBC30ALPbF
SiHFBC30AL-E3
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
a, e
Linear Derating Factor
Single Pulse Avalanche Energy
b
Avalanche Current
a
Repetiitive Avalanche
Energy
a
T
C
= 25 °C
Maximum Power Dissipation
Peak Diode Recovery dV/dt
c, e
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting T
J
= 25 °C, L = 46 mH, R
g
= 25
,
I
AS
= 3.6 A (see fig. 12).
c. I
SD
3.6 A, dI/dt
170 A/μs, V
DD
V
DS
, T
J
150 °C.
d. 1.6 mm from case.
e. Uses IRFBC30A/SiHFBC30A data and test conditions.
E
AS
I
AR
E
AR
P
D
dV/dt
T
J
, T
stg
V
GS
at 10 V
T
C
= 25 °C
T
C
= 100 °C
SYMBOL
V
DS
V
GS
I
D
I
DM
LIMIT
600
± 30
3.6
2.3
14
0.69
290
3.6
7.4
74
7.0
- 55 to + 150
300
d
W/°C
mJ
A
mJ
W
V/ns
°C
A
UNIT
V
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91109
S11-1052-Rev. C, 30-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFBC30AS, SiHFBC30AS, IRFBC30AL, SiHFBC30AL
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient (PCB
Mounted, steady-state)
a
Maximum Junction-to-Case (Drain)
SYMBOL
R
thJA
R
thJC
TYP.
-
-
MAX.
40
1.7
UNIT
°C/W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS
(T
J
= 25 °C, unless otherwise noted)
PARAMETER
Static
Drain-Source Breakdown Voltage
V
DS
Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Effective Output Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
Current
a
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DS
V
DS
/T
J
V
GS(th)
I
GSS
I
DSS
R
DS(on)
g
fs
C
iss
C
oss
C
rss
C
oss
C
oss
eff.
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
V
GS
= 0, I
D
= 250 μA
Reference to 25 °C, I
D
= 1 mA
d
V
DS
= V
GS
, I
D
= 250 μA
V
GS
= ± 30 V
V
DS
= 600 V, V
GS
= 0 V
V
DS
= 480 V, V
GS
= 0 V, T
J
= 125 °C
V
GS
= 10 V
I
D
= 2.2 A
b
V
DS
= 50 V, I
D
= 2.2 A
600
-
2.0
-
-
-
-
2.1
-
0.67
-
-
-
-
-
-
-
-
4.5
± 100
25
250
2.2
-
V
V/°C
V
nA
μA
S
V
GS
= 0 V,
V
DS
= 25 V,
f = 1.0 MHz, see fig. 5
V
DS
= 1.0 V, f = 1.0 MHz
V
GS
= 0 V
V
DS
= 480 V, f = 1.0 MHz
V
DS
= 0 V to 480 V
c
V
GS
= 10 V
I
D
= 3.6 A, V
DS
= 480 V,
see fig. 6 and 13
b
-
-
-
-
-
-
-
-
-
-
510
70
3.5
730
19
31
-
-
-
9.8
13
19
12
-
-
-
-
-
-
23
5.4
11
-
-
-
-
ns
nC
pF
V
DD
= 300 V, I
D
= 3.6 A,
R
g
= 12
,
R
D
= 82
,
see fig. 10
b, d
-
-
-
-
-
-
-
-
-
-
-
400
1.1
3.6
A
14
1.6
600
1.7
V
ns
μC
G
S
T
J
= 25 °C, I
S
= 3.6 A, V
GS
= 0 V
b
T
J
= 25 °C, I
F
= 3.6 A, dI/dt = 100 A/μs
b,
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width
300 μs; duty cycle
2 %.
c. C
oss
eff. is a fixed capacitance that gives the same charging time as C
oss
while V
DS
is rising from 0 to 80 % V
DS
.
d. Uses IRFBC30A/SiHFBC30A data and test conditions.
www.vishay.com
2
Document Number: 91109
S11-1052-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFBC30AS, SiHFBC30AS, IRFBC30AL, SiHFBC30AL
Vishay Siliconix
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
100
I
D
, Drain-to-Source Current (A)
I
D
, Drain-to-Source Current (A)
10
10
T
J
= 150
°
C
1
1
T
J
= 25
°
C
0.1
0.1
0.01
0.1
4.5V
20µs PULSE WIDTH
T
J
= 25
°
C
1
10
100
0.01
4.0
V DS = 50V
20µs PULSE WIDTH
5.0
6.0
7.0
8.0
9.0
V
DS
, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
V
GS
, Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
10
TOP
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
, Drain-to-Source Current (A)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
3.0
I
D
= 3.6A
2.5
2.0
1
1.5
1.0
4.5V
0.5
0.1
0.1
20µs PULSE WIDTH
T
J
= 150
°
C
1
10
100
0.0
-60 -40 -20
V
GS
= 10V
0
20
40
60
80 100 120 140 160
V
DS
, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
T
J
, Junction Temperature (
°
C)
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91109
S11-1052-Rev. C, 30-May-11
www.vishay.com
3
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFBC30AS, SiHFBC30AS, IRFBC30AL, SiHFBC30AL
Vishay Siliconix
10000
100
1000
Coss = C + Cgd
ds
I
SD
, Reverse Drain Current (A)
VGS = 0V,
f = 1 MHZ
Ciss = C + Cgd, C
gs
ds SHORTED
Crss = C
gd
C, Capacitance(pF)
Ciss
100
10
T
J
= 150
°
C
T
J
= 25
°
C
1
Coss
10
Crss
1
1
10
100
1000
0.1
0.4
V
GS
= 0 V
0.6
0.8
1.0
1.2
VDS, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
V
SD
,Source-to-Drain Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
20
I
D
= 3.6A
V
DS
= 480V
V
DS
= 300V
V
DS
= 120V
100
V
GS
, Gate-to-Source Voltage (V)
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
16
I
D
, Drain Current (A)
10
10us
12
100us
8
1
1ms
4
0
0
4
8
12
FOR TEST CIRCUIT
SEE FIGURE 13
16
20
24
0.1
T
C
= 25 ° C
T
J
= 150 ° C
Single Pulse
10
100
10ms
1000
10000
Q
G
, Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
V
DS
, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
www.vishay.com
4
Document Number: 91109
S11-1052-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
IRFBC30AS, SiHFBC30AS, IRFBC30AL, SiHFBC30AL
Vishay Siliconix
4.0
V
GS
R
g
V
DS
R
D
D.U.T.
+
- V
DD
I
D
, Drain Current (A)
3.0
10 V
Pulse width
≤
1 µs
Duty factor
≤
0.1 %
2.0
Fig. 10a - Switching Time Test Circuit
V
DS
1.0
90 %
0.0
25
50
75
100
125
150
T
C
, Case Temperature ( ° C)
Fig. 9 - Maximum Drain Current vs. Case Temperature
10
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig. 10b - Switching Time Waveforms
Thermal Response (Z
thJC
)
1 D = 0.50
0.20
0.10
0.1
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.0001
0.001
0.01
0.1
1
P
DM
t
1
t
2
0.01
0.00001
t
1
, Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
15 V
V
DS
t
p
V
DS
L
Driver
R
g
20 V
t
p
D.U.T.
I
AS
0.01
Ω
+
A
- V
DD
I
AS
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91109
S11-1052-Rev. C, 30-May-11
Fig. 12b - Unclamped Inductive Waveforms
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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