Datasheet> 器件分类 > 半导体> 模拟混合信号IC> 74HC193D652

74HC193D652: 产品描述Counter ICs 4BIT COUNTR U/D SYNC; 产品类别半导体模拟混合信号IC; 文件大小832KB，共28页; 制造商NXP(恩智浦); 官网地址https://www.nxp.com

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74HC193D652概述

Counter ICs 4BIT COUNTR U/D SYNC

74HC193D652规格参数

参数名称	属性值
Product Attribute	Attribute Value
制造商 Manufacturer	NXP(恩智浦)
产品种类 Product Category	Counter ICs
RoHS	Details
Logic Family	74HC
Number of Bits	4 bit
工作电源电压 Operating Supply Voltage	2 V to 6 V
工作温度范围 Operating Temperature Range	- 40 C to + 85 C
安装风格 Mounting Style	SMD/SMT
封装 / 箱体 Package / Case	SO-24
系列 Packaging	Tube
Output Current	+/- 5.2 mA
最大工作温度 Maximum Operating Temperature	+ 85 C
最小工作温度 Minimum Operating Temperature	- 40 C
工厂包装数量 Factory Pack Quantity	1000
单位重量 Unit Weight	0.010857 oz

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74HC193; 74HCT193

Presettable synchronous 4-bit binary up/down counter

Rev. 5 — 29 January 2016

Product data sheet

1. General description

The 74HC193; 74HCT193 is a 4-bit synchronous binary up/down counter. Separate

up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state

synchronously with the LOW-to-HIGH transition of either clock input. If the CPU clock is

pulsed while CPD is held HIGH, the device will count up. If the CPD clock is pulsed while

CPU is held HIGH, the device will count down. Only one clock input can be held HIGH at

any time to guarantee predictable behavior. The device can be cleared at any time by the

asynchronous master reset input (MR); it may also be loaded in parallel by activating the

asynchronous parallel load input (PL). The terminal count up (TCU) and terminal count

down (TCD) outputs are normally HIGH. When the circuit has reached the maximum

count state of 15, the next HIGH-to-LOW transition of CPU will cause TCU to go LOW.

TCU will stay LOW until CPU goes HIGH again, duplicating the count up clock. Likewise,

the TCD output will go LOW when the circuit is in the zero state and the CPD goes LOW.

The terminal count outputs can be used as the clock input signals to the next higher order

circuit in a multistage counter, since they duplicate the clock waveforms. Multistage

counters will not be fully synchronous, since there is a slight delay time difference added

for each stage that is added. The counter may be preset by the asynchronous parallel

load capability of the circuit. Information present on the parallel data inputs (D0 to D3) is

loaded into the counter and appears on the outputs (Q0 to Q3) regardless of the

conditions of the clock inputs when the parallel load (PL) input is LOW. A HIGH level on

the master reset (MR) input will disable the parallel load gates, override both clock inputs

and set all outputs (Q0 to Q3) LOW. If one of the clock inputs is LOW during and after a

reset or load operation, the next LOW-to-HIGH transition of that clock will be interpreted

as a legitimate signal and will be counted. Inputs include clamp diodes. This enables the

use of current limiting resistors to interface inputs to voltages in excess of V

2. Features and benefits



Input levels:



For 74HC193: CMOS level



For 74HCT193: TTL level



Synchronous reversible 4-bit binary counting



Asynchronous parallel load



Asynchronous reset



Expandable without external logic



Complies with JEDEC standard no. 7A



ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-A exceeds 200 V.

74HC193D652相似产品对比

	74HC193D652	74HC193D	74HCT193N	74HC193DB
描述	Counter ICs 4BIT COUNTR U/D SYNC	Counter ICs 4BIT COUNTR U/D SYNC	Counter ICs 4-BIT BINARY UP/DOWN COUNTER	Counter ICs 4BIT BIN UP/DN CNTER SYNCHRONOUS
是否无铅	-	不含铅	不含铅	不含铅
是否Rohs认证	-	符合	符合	符合
厂商名称	-	NXP(恩智浦)	NXP(恩智浦)	NXP(恩智浦)
零件包装代码	-	SOIC	DIP	SOIC
包装说明	-	3.9 MM, PLASTIC, MS-012, SOT-109, SO-16	DIP, DIP16,.3	SOT-338-1, SSOP-16
针数	-	16	16	16
Reach Compliance Code	-	unknown	unknown	unknown
其他特性	-	TCO UP AND TCO DOWN OUTPUTS; SEPARATE UP/DOWN CLOCK	TCO UP AND TCO DOWN OUTPUTS; SEPARATE UP/DOWN CLOCK	TCO UP AND TCO DOWN OUTPUTS; SEPARATE UP/DOWN CLOCK
计数方向	-	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL
系列	-	HC/UH	HCT	HC/UH
JESD-30 代码	-	R-PDSO-G16	R-PDIP-T16	R-PDSO-G16
长度	-	9.9 mm	21.6 mm	6.2 mm
负载电容（CL）	-	50 pF	50 pF	50 pF
负载/预设输入	-	YES	YES	YES
逻辑集成电路类型	-	BINARY COUNTER	BINARY COUNTER	BINARY COUNTER
最大频率@ Nom-Sup	-	13000000 Hz	24000000 Hz	13000000 Hz
最大I（ol）	-	0.004 A	0.004 A	0.004 A
工作模式	-	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
位数	-	4	4	4
功能数量	-	1	1	1
端子数量	-	16	16	16
最高工作温度	-	125 °C	125 °C	125 °C
最低工作温度	-	-40 °C	-40 °C	-40 °C
封装主体材料	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	-	SOP	DIP	SSOP
封装等效代码	-	SOP16,.25	DIP16,.3	SSOP16,.3
封装形状	-	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	-	SMALL OUTLINE	IN-LINE	SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）	-	260	NOT SPECIFIED	260
电源	-	2/6 V	5 V	2/6 V
传播延迟（tpd）	-	65 ns	65 ns	65 ns
认证状态	-	Not Qualified	Not Qualified	Not Qualified
座面最大高度	-	1.75 mm	4.7 mm	2 mm
最大供电电压 (Vsup)	-	6 V	5.5 V	6 V
最小供电电压 (Vsup)	-	2 V	4.5 V	2 V
标称供电电压 (Vsup)	-	5 V	5 V	5 V
表面贴装	-	YES	NO	YES
技术	-	CMOS	CMOS	CMOS
温度等级	-	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
端子面层	-	NICKEL/PALLADIUM/GOLD (NI/PD/AU)	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD
端子形式	-	GULL WING	THROUGH-HOLE	GULL WING
端子节距	-	1.27 mm	2.54 mm	0.65 mm
端子位置	-	DUAL	DUAL	DUAL
处于峰值回流温度下的最长时间	-	30	NOT SPECIFIED	30
触发器类型	-	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
宽度	-	3.9 mm	7.62 mm	5.3 mm
最小 fmax	-	13 MHz	13 MHz	13 MHz
Base Number Matches	-	1	1	1

74HC193D652

74HC193D652在线购买

74HC193D652概述

74HC193D652规格参数

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74HC193D652相似产品对比

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