REVISIONS
LTR
A
B
C
DESCRIPTION
Changes in accordance with NOR 5962-R008-91.
Changes in accordance with NOR 5962-R217-93.
Updated boilerplate. Removed programming specifics from drawing,
including table III. Separated source bulletin from body of drawing. -
glg
Corrected page number count on front page. Updated boilerplate.
ksr.
5 year review and update. Changed input and output capacitance
from 6 pF to 10 pF and 8 pF to 10 pF respectively. ksr
DATE
91-10-17
93-08-20
00-08-30
APPROVED
Michael. A. Frye
Michael. A. Frye
Raymond Monnin
D
E
04-11-30
06-06-12
Raymond Monnin
Raymond Monnin
THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED.
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
REV
SHEET
E
1
E
2
E
3
E
4
E
5
E
6
E
7
E
8
E
9
E
10
E
11
PMIC N/A
PREPARED BY
James E. Jamison
CHECKED BY
Raymond Monnin
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY All
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF
DEFENSE
AMSC N/A
APPROVED BY
Michael. A. Frye
DRAWING APPROVAL DATE
1988 Sep. 22
REVISION LEVEL
E
MICROCIRCUIT, DIGITAL,
CMOS, 2K X 8 REGISTERED
UVEPROM, MONOLITHIC
SILICON
SIZE
A
SHEET
1 OF
11
5962-E484-06
CAGE CODE
67268
5962-87529
DSCC FORM 2233
APR 97
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example:
5962-87529
|
|
|
Drawing number
01
|
|
|
Device type
(see 1.2.1)
L
|
|
|
Case outline
(see 1.2.2)
X
|
|
|
Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows:
Device type
01
02
Generic number
1/
1/
Circuit
2K x 8-registered UVEPROM
2K x 8-registered UVEPROM
Access time
45 ns
35 ns
1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835, and as follows:
Outline letter
K
L
3
Descriptive designator
GDFP2-F24 or CDFP3-F24
GDIP3-T24 or CDIP4-T24
CQCC1-N28
Terminals
24
24
28
Package style 2/
flat package
dual-in-line package
square chip carrier package
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings. 3/
Supply voltage range .........................................................
DC voltage applied to outputs in high Z state ....................
DC program voltage ..........................................................
DC input voltage range .....................................................
Storage temperature range ...............................................
Maximum power dissipation (P
D
): 4/ .................................
Lead temperature (soldering, 10 seconds) .......................
Junction temperature (T
J
) 5/.............................................
Thermal resistance, junction-to-case (Θ
JC
) ......................
Endurance .........................................................................
Data retention ....................................................................
1.4 Recommended operating conditions.
Case operating temperature range (T
C
) ................................. -55°C to +125°C
Supply voltage range (V
CC
)
.....................................................
4.5 V dc to 5.5 V dc
-0.5 V dc to +7.0 V dc
-0.5 to +7.0 V dc
14.0 V
-3.0 V dc to +7.0 V dc
-65°C to +150°C
1.0 W
+300°C
+150°C
See MIL-STD-1835
25 cycles/byte (minimum)
10 years minimum
1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and
will also be listed in MIL-HDBK-103.
2/ Lid shall be transparent to permit ultraviolet erasure.
3/ Unless otherwise specified, all voltages are referenced to ground.
4/ Must withstand the added P
D
due to short-circuit test; e.g., I
OS
.
5/ Maximum junction temperature may be increased to +175°C during burn-in and steady-state life.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
E
5962-87529
SHEET
2
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 -
MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 -
MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at
http://assist.daps.dla.mil/quicksearch/
or
http://assist.daps.dla.mil
or from
the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
this drawing shall take precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN
class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing
(QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535
may be processed as QML product in accordance with the manufacturer's approved program plan and qualifying activity
approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make
modifications to the requirements herein. These modifications shall not affect the PIN as described herein. A "Q" or "QML"
certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in
MIL-PRF-38535, appendix A and herein.
3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.2 Truth table. The truth table shall be as specified on figure 2.
3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein.
3.2.3.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing
shall be as specified on figure 2.
3.2.3.2 Programmed devices. The truth table for programmed devices shall be specified by an altered item drawing.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
E
5962-87529
SHEET
3
TABLE I. Electrical performance characteristics.
|Symbol
|
|
|
Input leakage current
|I
IX
|
Output leakage current 1/
|I
LO
|
Operating supply current
|I
CC
|
|
|
V
IH
Input high voltage 2/
|
|
V
IL
Input low voltage 2/
|
High level output voltage
|
V
OH
|
|
Low level output voltage
|
V
OL
|
|
|
Output short-circuit
|
I
OS
current 3/ 4/
|
|
C
IN
Input capacitance 4/
|
|
C
OUT
Output capacitance 4/
|
|
Address setup to clock
|
t
SA
|
high
|
|
Address hold from clock
|
t
HA
|
Clock high to valid output
|
t
CO
|
|
|
t
PWC
Clock pulse width 4/
|
Valid output from clock
|
t
COS
|
high 4/ 5/
|
Test
|
Conditions
|
-55°C < T
C
< +125°C
|
4.5 V < V
CC
< 5.5 V
|
unless otherwise specified
|V
IN
= 5.5 V and GND
|
|V
OUT
= 5.5 V and GND
|output
disabled
|
E/ E
S
=V
IL
,
INIT = V
IH
,
|
addresses cycling between
|
0 V and 3.0 V, f = 1/2t
PWC
|
V
CC
= 4.5 V and 5.5 V
|
|
V
CC
= 4.5 V and 5.5 V
|
|
V
IL
= 0.8 V, V
IH
= 2.0 V
|
I
OH
= -4.0 mA, V
CC
= 4.5 V
|
|
V
IL
= 0.8 V, V
IH
= 2.0 V
|
I
OL
= 16 mA, V
CC
= 4.5 V.
|
|
|
V
O
= GND
|
|
V
CC
= 5.5.V
| V
IN
= 0 V
|
T
C
= +25
°
C
|
|
see 4.3.1d
| V
OUT
= 0 V
|
f = 1.0 MHz
|
|
|
See figures 3 and 4
|
as applicable
|
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Group A
|subgroups
|
|
|
1, 2, 3
|
|
1, 2, 3
|
|
1, 2, 3
|
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|
1, 2, 3
|
|
1, 2, 3
|
|
1, 2, 3
|
|
|
1, 2, 3
|
|
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1, 2, 3
|
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4
|
|
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|
9, 10, 11
|
|
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|
9, 10, 11
|
|
9, 10, 11
|
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|
9, 10, 11
|
|
9, 10, 11
|
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|Device
|
type
|
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All
|
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All
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Limits
|
|
|Unit
|
Min
|
Max
|
|
|
|
|
-10
|
10
|
µA
|
|
|
|
|
+40
|
µA
|
|
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|
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2.0
|
|
|
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2.4
|
|
|
|
|
|
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-20
|
|
|
|
|
|
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45
|
35
|
|
|
0
|
|
|
|
|
20
|
|
|
|
|
120
|
|
|
|
|
0.8
|
|
|
|
|
0.4
|
|
|
|-
125
|
|
10
|
|
10
|
|
|
|
|
|
|
|
|
25
|
15
|
|
|
|
30
|
20
|
|
mA
|
|
|
V
|
|
V
|
|
V
|
|
|
V
|
|
|
|
mA
|
|
|
pF
|
|
|
|
ns
|
|
|
|
ns
|
|
ns
|
|
|
ns
|
|
ns
|
|
All
All
All
All
All
All
All
01
02
All
01
02
All
01
02
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
E
5962-87529
SHEET
4
TABLE I. Electrical performance characteristics.
Test
|
Symbol
|
|
|
|
|
t
SES
|
|
|
t
HES
|
|
|
|
|
Conditions
-55
°
C < T
C
< +125
°
C
4.5 V < V
CC
< 5.5 V
unless otherwise specified
|
Group A
|
subgroups
|
|
|
|
9, 10, 11
|
|
|
9, 10, 11
|
|
9, 10, 11
|
|
|
|
9, 10, 11
|
|
|
9, 10, 11
|
|
|
9, 10, 11
|
|
|
9, 10, 11
|
|
|
9, 10, 11
|
|
|
Device
|
type
|
|
|
|
All
|
|
|
All
|
|
|
|
|
Limits
|
|
|
Unit
|
Min
|
Max
|
|
|
|
|
|
|
15
|
|
|
|
|
|
|
|
|
|
|
ns
|
|
|
ns
|
E
S
setup to clock high
4/
E
S
hold from clock high
4/
|
See figures 3 and 4
|
as applicable
|
|
|
|
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|
5
|
|
|
Delay from
INIT to valid
|
t
DI
|
output 4/
|
01
02
|
35
|
ns
|
20
|
|
|
|
|
ns
|
INIT recovery to clock
high 4/
INIT pulse width 4/
|
|
t
RI
|
|
|
All
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
20
|
|
|
|
|
t
PWI
|
|
Inactive output from clock
|
t
HZC
|
high 4/ 5/ 6/
|
01
02
01
02
01
02
01
02
|
|
|
|
25
|
|
ns
|
20
|
|
|
|
|
|
|
30
|
ns
|
|
20
|
|
|
|
|
|
|
|
|
|
|
30
|
ns
|
20
|
|
|
|
30
|
ns
|
20
|
|
|
Valid output from
E
low
4/ 7/
Inactive output from
E
high 4/ 6/ 7/
1/
2/
3/
4/
5/
6/
7/
|
t
DOE
|
|
|
t
HZE
|
|
For devices using the synchronous enable, the device must be clocked after applying these voltages to perform this
measurement.
These are absolute voltages with respect to device ground pin and include all overshoots due to system or tester noise.
For test purposes, not more than one output at a time should be shorted. Short-circuit test duration should not exceed 30
seconds.
This parameter tested initially and after any design or process changes which could affect this parameter, therefore, shall be
guaranteed to the limits specified in table I.
Applies only when the synchronous
E
S
function is used.
Transition is measured at steady-state high level -500 mV or stead-state low level +500 mV on the output from the 1.5 V
level on the input with loads shown on figure 3B.
Applies only when the asynchronous
E
function is used.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
E
5962-87529
SHEET
5
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