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5550-J

产品描述Ceramic Capacitor, Multilayer, Ceramic, Surface Mount, 5550, CHIP
产品类别无源元件    电容器   
文件大小164KB,共7页
制造商Syfer
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5550-J概述

Ceramic Capacitor, Multilayer, Ceramic, Surface Mount, 5550, CHIP

5550-J规格参数

参数名称属性值
厂商名称Syfer
包装说明, 5550
Reach Compliance Codecompliant
ECCN代码EAR99
电容器类型CERAMIC CAPACITOR
介电材料CERAMIC
制造商序列号C0G/X7R
安装特点SURFACE MOUNT
多层Yes
端子数量2
最高工作温度125 °C
最低工作温度-55 °C
封装形状RECTANGULAR PACKAGE
包装方法BULK; WAFFLE PACK
尺寸代码5550
表面贴装YES
端子形状J BEND
Base Number Matches1

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Surface Mount
Capacitors
Chip Capacitors
Stacked Chip
C0G/X7R
Ordering Information
8060
Chip
Size
B
Finish
B = Bare Chip
Assembly
500
Voltage
050 = 50V
100 = 100V
200 = 200V
500 = 500V
1K0 = 1000V
2K0 = 2000V
0126
Capacitance
Expressed in
picofarads (pF).
First digit is 0.
Second and third
digits are significant
figures of capacitance
code.
The fourth digit is
number of zeros
following.
eg: 0126=12µF.
K
Tolerance
M = ±20%
Standard
K = ±10%
Optional
X
Dielectric
C = C0G
X = X7R
B
Packaging
R =330mm
(13”)
reel
B =Bulk
J
Mounting
Style
N =Bare Chip
SM Assembly
J =J leaded
SM Assembly
L =L leaded
SM Assembly
S =Straight
leaded DIL
Assembly
W00
5
Customer
No. of
Special
Chips
Requirements
Notes
1. Other capacitance tolerances may also be available.
2. Tape and reel packing is available on 2220 & 2225 single chip ‘J’
and ‘L’ leaded products and 1812, 2220, 2225 2-stack unleaded
(‘N’ leaded) products. All other products will be supplied bulk
packed in protective foam. Special waffle packing requirements
can be considered.
3. Higher working voltages and alternative chip sizes are also
available by special request.
Design Notes
When specifying these components, consideration must be given
to their physical size, aspect ratio and mass with particular
reference to thermal mismatch, mechanical shock and vibration
characteristics.
It is not recommended that chip sizes greater than 3640 are
mounted directly to the board, but are lifted clear using stand off
leads (‘J’ or ‘L’) to prevent mechanical cracking.
Where possible, using a larger size chip with less chips in the
stack will result in a more stable product when placed on the
board, as the result of an improved aspect ratio.
A general handling recommendations sheet covering these, and
other points, is available upon request from our Sales Office.
A data sheet covering recommended pad designs is available on
request from our Sales Office.
Please refer all specific enquiries to the Sales Office.
Materials
In all cases, leadframes, where fitted, will be silver plated phospher
bronze.
Chip to chip attachment, and chip to leadframe attachment will be
by either high melting point solder (M.Pt. 300ºC typ.) or high
conductivity silver loaded epoxy adhesive depending on product.
45

5550-J相似产品对比

5550-J 5550-L 5550-S
描述 Ceramic Capacitor, Multilayer, Ceramic, Surface Mount, 5550, CHIP Ceramic Capacitor, Multilayer, Ceramic, Surface Mount, 5550, CHIP Ceramic Capacitor, Multilayer, Ceramic, Through Hole Mount, 8060, DIP
厂商名称 Syfer Syfer Syfer
包装说明 , 5550 , 5550 , 8060
Reach Compliance Code compliant compliant compliant
电容器类型 CERAMIC CAPACITOR CERAMIC CAPACITOR CERAMIC CAPACITOR
介电材料 CERAMIC CERAMIC CERAMIC
制造商序列号 C0G/X7R C0G/X7R C0G/X7R
安装特点 SURFACE MOUNT SURFACE MOUNT THROUGH HOLE MOUNT
多层 Yes Yes Yes
端子数量 2 2 2
最高工作温度 125 °C 125 °C 125 °C
最低工作温度 -55 °C -55 °C -55 °C
封装形状 RECTANGULAR PACKAGE RECTANGULAR PACKAGE RECTANGULAR PACKAGE
包装方法 BULK; WAFFLE PACK BULK; WAFFLE PACK BULK; WAFFLE PACK
尺寸代码 5550 5550 8060
表面贴装 YES YES NO
端子形状 J BEND GULL WING FLAT
Base Number Matches 1 1 1
ECCN代码 EAR99 EAR99 -
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