PD -90902B
IRF640S/L
HEXFET
®
Power MOSFET
l
l
l
l
l
l
l
Surface Mount (IRF640S)
Low-profile through-hole (IRF640L)
Available in Tape & Reel (IRF640S)
Dynamic dv/dt Rating
150°C Operating Temperature
Fast Switching
Fully Avalanche Rated
D
V
DSS
= 200V
R
DS(on)
= 0.18Ω
G
S
I
D
= 18A
Description
Third Generation HEXFETs from International Rectifier provide
the designer with the best combinations of fast switching ,
ruggedized device design, low on-resistance and cost-
effectiveness.
The D
2
Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the highest
power capability and the lowest possible on-resistance in any
existing surface mount package. The D
2
Pak is suitable for high
current applications because of its low internal connection
resistance and can dissipate up to 2.0W in a typical surface
mount application.The through-hole version (IRF640L) is
available for low-profile applications.
D 2 P ak
T O -26 2
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
A
= 25°C
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
18
11
72
3.1
130
1.0
± 20
580
18
13
5.0
-55 to + 175
300 (1.6mm from case )
Units
A
W
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
θJC
R
θJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
–––
–––
Max.
1.0
40
Units
°C/W
www.irf.com
1
7/20/99
IRF640S/L
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
V
(BR)DSS
Drain-to-Source Breakdown Voltage
∆V
(BR)DSS
/∆T
J
Breakdown Voltage Temp. Coefficient
R
DS(on)
Static Drain-to-Source On-Resistance
V
GS(th)
Gate Threshold Voltage
g
fs
Forward Transconductance
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
200
–––
–––
2.0
6.7
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.29
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
14
51
45
36
7.5
1300
430
130
Max. Units
Conditions
–––
V
V
GS
= 0V, I
D
= 250µA
––– V/°C Reference to 25°C, I
D
= 1mA
0.18
Ω
V
GS
= 10V, I
D
= 11A
4.0
V
V
DS
= V
GS
, I
D
= 250µA
–––
S
V
DS
= 50V, I
D
= 11A
25
V
DS
= 200V, V
GS
= 0V
µA
250
V
DS
= 160V, V
GS
= 0V, T
J
= 125°C
100
V
GS
= 20V
nA
-100
V
GS
= -20V
70
I
D
= 18A
13
nC V
DS
=160V
39
V
GS
= 10V, See Fig. 6 and 13
–––
V
DD
=100V
–––
I
D
= 18A
ns
–––
R
G
= 9.1Ω
–––
R
D
= 5.4Ω, See Fig. 10
Between lead,
nH
–––
and center of die contact
–––
V
GS
= 0V
–––
pF
V
DS
= 25V
–––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Notes:
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 18
showing the
A
G
integral reverse
––– ––– 72
S
p-n junction diode.
––– ––– 2.0
V
T
J
= 25°C, I
S
= 18A, V
GS
= 0V
––– 300 610
ns
T
J
= 25°C, I
F
= 18A
––– 3.4 7.1
µC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width
≤
300µs; duty cycle
≤
2%.
Uses IRF640 data and test conditions
V
DD
= 50V, starting T
J
= 25°C, L = 2.7mH
R
G
= 25Ω, I
AS
= 18A. (See Figure 12)
T
J
≤
150°C
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
I
SD
≤
18A, di/dt
≤
150A/µs, V
DD
≤
V
(BR)DSS
,
2
www.irf.com
IRF640S/L
Fig 1.
Typical Output Characteristics,
T
J
= 25
o
C
Fig 2.
Typical Output Characteristics,
T
J
= 175
o
C
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
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3
IRF640S/L
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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IRF640S/L
V
DS
V
GS
R
G
R
D
D.U.T.
+
-
V
DD
10V
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
Fig 10a.
Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 9.
Maximum Drain Current Vs.
Case Temperature
Fig 10b.
Switching Time Waveforms
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
FPGA/CPLD
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