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SN74LVC2G66
DUAL BILATERAL ANALOG SWITCH
www.ti.com
SCES325I – JULY 2001 – REVISED JUNE 2006
FEATURES
•
•
•
•
•
•
Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
1.65-V to 5.5-V V
CC
Operation
Inputs Accept Voltages to 5.5 V
Max t
pd
of 0.8 ns at 3.3 V
High On-Off Output Voltage Ratio
High Degree of Linearity
DCT PACKAGE
(TOP VIEW)
•
•
•
•
High Speed, Typically 0.5 ns
(V
CC
= 3 V, C
L
= 50 pF)
Rail-to-Rail Input/Output
Low On-State Resistance, Typically
≈6 Ω
(V
CC
= 4.5 V)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOM VIEW)
DCU PACKAGE
(TOP VIEW)
1A
1B
2C
GND
1
2
3
4
8
7
6
5
V
CC
1C
2B
2A
1A
1B
2C
GND
1
2
3
4
8
7
6
5
V
CC
1C
2B
2A
GND
2C
1B
1A
4 5
3 6
2 7
1 8
2A
2B
1C
V
CC
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This dual bilateral analog switch is designed for 1.65-V to 5.5-V V
CC
operation.
The SN74LVC2G66 can handle both analog and digital signals. The device permits signals with amplitudes of
up to 5.5 V (peak) to be transmitted in either direction.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
Each switch section has its own enable-input control (C). A high-level voltage applied to C turns on the
associated switch section.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for
analog-to-digital and digital-to-analog conversion systems.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2006, Texas Instruments Incorporated
SN74LVC2G66
DUAL BILATERAL ANALOG SWITCH
SCES325I – JULY 2001 – REVISED JUNE 2006
www.ti.com
ORDERING INFORMATION
T
A
PACKAGE
(1)
NanoStar™ – WCSP (DSBGA)
0.17-mm Small Bump – YEA
NanoFree™ – WCSP (DSBGA)
0.17-mm Small Bump – YZA (Pb-free)
–40°C to 85°C
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SSOP – DCT
VSSOP – DCU
(1)
(2)
Reel of 3000
Reel of 3000
Reel of 250
ORDERABLE PART NUMBER
SN74LVC2G66YEAR
SN74LVC2G66YZAR
Reel of 3000
SN74LVC2G66YEPR
SN74LVC2G66YZPR
SN74LVC2G66DCTR
SN74LVC2G66DCUR
SN74LVC2G66DCUT
C66_ _ _
C66_
_ _ _C6_
TOP-SIDE MARKING
(2)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
•
= Pb-free).
FUNCTION TABLE
(EACH SECTION)
CONTROL
INPUT
(C)
L
H
SWITCH
Off
On
LOGIC DIAGRAM, EACH SWITCH (POSITIVE LOGIC)
1A
1
2
1B
1C
7
One of Two Switches
2
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www.ti.com
SN74LVC2G66
DUAL BILATERAL ANALOG SWITCH
SCES325I – JULY 2001 – REVISED JUNE 2006
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
V
CC
V
I
V
O
I
IK
I
I/OK
I
T
Supply voltage range
(2)
Input voltage range
(2) (3)
Switch I/O voltage range
(2) (3) (4)
Control input clamp current
I/O port diode current
On-state switch current
Continuous current through V
CC
or GND
DCT package
θ
JA
Package thermal impedance
(5)
DCU package
YEA/YZA package
YEP/YZP package
T
stg
(1)
(2)
(3)
(4)
(5)
Storage temperature range
–65
V
I
< 0
V
I/O
< 0 or V
I/O
> V
CC
V
I/O
= 0 to V
CC
–0.5
–0.5
–0.5
MAX
6.5
6.5
V
CC
+ 0.5
–50
–50
±50
±100
220
227
140
102
150
°C
°C/W
UNIT
V
V
V
mA
mA
mA
mA
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground, unless otherwise specified.
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
This value is limited to 5.5 V maximum.
The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions
(1)
MIN
V
CC
V
I/O
Supply voltage
I/O port voltage
V
CC
= 1.65 V to 1.95 V
V
IH
High-level input voltage, control input
V
CC
= 2.3 V to 2.7 V
V
CC
= 3 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
V
CC
= 1.65 V to 1.95 V
V
IL
Low-level input voltage, control input
V
CC
= 2.3 V to 2.7 V
V
CC
= 3 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
V
I
Control input voltage
V
CC
= 1.65 V to 1.95 V
∆t/∆v
Input transition rise/fall time
V
CC
= 2.3 V to 2.7 V
V
CC
= 3 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
T
A
(1)
Operating free-air temperature
–40
0
1.65
0
V
CC
× 0.65
V
CC
× 0.7
V
CC
× 0.7
V
CC
× 0.7
V
CC
× 0.35
V
CC
× 0.3
V
CC
× 0.3
V
CC
× 0.3
5.5
20
20
10
10
85
°C
ns/V
V
V
V
MAX
5.5
V
CC
UNIT
V
V
All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs,
literature number SCBA004.
Submit Documentation Feedback
3
SN74LVC2G66
DUAL BILATERAL ANALOG SWITCH
SCES325I – JULY 2001 – REVISED JUNE 2006
www.ti.com
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
I
S
= 4 mA
r
on
On-state switch resistance
V
I
= V
CC
or GND,
V
C
= V
IH
(see
Figure 1
and
Figure 2)
I
S
= 8 mA
I
S
= 24 mA
I
S
= 32 mA
I
S
= 4 mA
r
on(p)
Peak on-state resistance
V
I
= V
CC
to GND,
V
C
= V
IH
(see
Figure 1
and
Figure 2)
I
S
= 8 mA
I
S
= 24 mA
I
S
= 32 mA
I
S
= 4 mA
∆r
on
Difference of on-state resistance
between switches
V
I
= V
CC
to GND,
V
C
= V
IH
(see
Figure 1
and
Figure 2)
V
I
= V
CC
and V
O
= GND or
V
I
= GND and V
O
= V
CC
,
V
C
= V
IL
(see
Figure 3)
V
I
= V
CC
or GND, V
C
= V
IH
, V
O
= Open
(see
Figure 4)
V
C
= V
CC
or GND
V
C
= V
CC
or GND
V
C
= V
CC
– 0.6 V
I
S
= 8 mA
I
S
= 24 mA
I
S
= 32 mA
I
S(off)
Off-state switch leakage current
V
CC
1.65 V
2.3 V
3V
4.5 V
1.65 V
2.3 V
3V
4.5 V
1.65 V
2.3 V
3V
4.5 V
5.5 V
MIN TYP
(1)
12.5
9
7.5
6
85
22
12
7.5
MAX
30
20
15
10
120
(1)
30
(1)
20
15
7
5
3
2
±1
±0.1
(1)
±1
±0.1
(1)
±1
±0.1
(1)
10
1
(1)
500
3.5
6
14
µA
µA
µA
µA
µA
pF
pF
pF
Ω
Ω
Ω
UNIT
I
S(on)
I
I
I
CC
∆I
CC
C
ic
C
io(off)
C
io(on)
(1)
On-state switch leakage current
Control input current
Supply current
Supply-current change
Control input capacitance
Switch input/output capacitance
Switch input/output capacitance
5.5 V
5.5 V
5.5 V
5.5 V
5V
5V
5V
T
A
= 25°C
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see
Figure 5)
PARAMETER
t
pd (1)
t
en
(2)
FROM
(INPUT)
A or B
C
C
TO
(OUTPUT)
B or A
A or B
A or B
V
CC
= 1.8 V
±
0.15 V
MIN
2.3
2.5
MAX
2
10
10.5
V
CC
= 2.5 V
±
0.2 V
MIN
1.6
1.2
MAX
1.2
5.6
6.9
V
CC
= 3.3 V
±
0.3 V
MIN
1.5
2
MAX
0.8
4.4
7.2
V
CC
= 5 V
±
0.5 V
MIN
1.3
1.1
MAX
0.6
3.9
6.3
UNIT
ns
ns
ns
t
dis (3)
(1)
(2)
(3)
t
PLH
and t
PHL
are the same as t
pd
. The propagation delay is the calculated RC time constant of the typical on-state resistance of the
switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
t
PZL
and t
PZH
are the same as t
en
.
t
PLZ
and t
PHZ
are the same as t
dis
.
4
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