REVISIONS
LTR
A
DESCRIPTION
Added vendor CAGE number 6Y440 and 65786 to the drawing as
approved sources of supply. Removed vendor CAGE number 0BK02
from the drawing. Also deleted ESDS from the drawing. Editorial
changes throughout.
Changes in accordance with NOR 5962-R349-92.
Added device types 05 and 06. Updated drawing to include new
verbage from standard boilerplate. Figure 1 Terminal connections, for
case outline Y, changed DQ to I/O,
W
to
WE
, and
C
to
CE
.
Removed CAGE numbers 61772, 6Y440, and 66301. Added CAGE
numbers 0EU86. ksr
D
Boilerplate update, part of 5 year review. ksr
07-11-02
Robert M. Heber
DATE (YR-MO-DA)
89-09-28
APPROVED
M. A. Frye
B
C
92-10-29
97-08-19
M. A. Frye
Ray Monnin
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
REV
SHEET
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
D
10
D
11
D
12
D
13
D
14
PREPARED BY
Kenneth S. Rice
CHECKED BY
Charles Reusing
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
APPROVED BY
DA DiCenzio
DRAWING APPROVAL DATE
88-07-27
AMSC N/A
MICROCIRCUIT, MEMORY, DIGITAL,
CMOS, 64K X 4 STATIC RANDOM
ACCESS MEMORY (SRAM),
MONOLITHIC SILICON
SIZE
A
SHEET
CAGE CODE
REVISION LEVEL
D
67268
1 OF
14
5962-88681
5962-E601-07
DSCC FORM 2233
APR 97
.
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
5962-88681
01
X_
A
Drawing number
Device type
(see 1.2.1)
Case outline
(see 1.2.2)
Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
02
03
04
05
06
Generic number
(See 6.6)
(See 6.6)
(See 6.6)
(See 6.6)
(See 6.6)
(See 6.6)
Circuit function
64K X 4 CMOS SRAM
64K X 4 CMOS SRAM
64K X 4 CMOS SRAM
64K X 4 CMOS SRAM
64K X 4 CMOS SRAM
64K X 4 CMOS SRAM
Access time
35 ns
45 ns
55 ns
70 ns
25 ns
20 ns
1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
L
X
Y
Descriptive designator
GDIP3-T24 or CDIP4-T24
CQCC3-N28
CDFP4-28
Terminals
24
28
28
Package style
dual-in-line package
rectangular chip carrier package
flat package
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings.
Voltage on any input relative to V
SS
range ------------------
Voltage applied to outputs range ------------------------------
Storage temperature range -------------------------------------
Maximum power dissipation (P
D
) ------------------------------
Lead temperature (soldering, 10 seconds)------------------
Thermal resistance, junction-to-case (Θ
JC
):
Cases L, X, and Y -----------------------------------------------
Junction temperature (T
J
) ---------------------------------------
1.4 Recommended operating conditions.
Supply voltage range (V
CC
) -------------------------------------
Supply voltage range (V
SS
)--------------------------------------
Input high voltage range (V
IH
) ----------------------------------
Input low voltage range (V
IL
) -----------------------------------
Case operating temperature range (T
C
) ---------------------
4.5 V dc to 5.5 V dc
0 V dc
2.2 V dc to V
CC
+0.5 V dc
-0.5 V dc to + 0.8 V dc 2/
-55°C to +125°C
-0.5 V dc to +7.0 V dc
-0.5 V dc to +6.0 V dc
-65°C to +150°C
1.0 W
+260°C
See MIL-STD-1835
+150°C 1/
1/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in
accordance with method 5004 of MIL-STD-883.
2/ V
IL
minimum = -3.0 V dc for pulse width less than 20 ns.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-88681
SHEET
D
2
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 -
MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 -
MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at
http://assist.daps.dla.mil/quicksearch/
or
http://assist.daps.dla.mil
or from
the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific
exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-
JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-
38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity
approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make
modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These
modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-PRF-38535
is required to identify when the QML flow option is used.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535, appendix A and herein.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 2.
3.2.4 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only.
Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the
internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor testing
shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as
provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after seal.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-88681
SHEET
D
3
TABLE I. Electrical performance characteristics.
Test
Symbol
Conditions
-55°C
≤
T
C
≤+125°C
unless otherwise specified
t
AVAV
= t
AVAV
(minimum),
V
CC
= 5.5 V,
CE
= V
IL
Group A
subgroups
1, 2, 3
Device
Type
01 - 04
05
06
Standby power supply current
TTL
1/
I
CC2
Limits
Min
Max
120
140
150
25
40
45
20
mA
Unit
Operating supply current
1/
I
CC1
CE
≥
V
IH
, all other inputs
≤
V
IL
or
≥
V
IH
,
V
CC
= 5.5 V, f = 0 MHz
01 - 04
05
06
Standby power supply current
CMOS
1/
I
CC3
CE
≥
(V
CC
-0.2 V), f = 0 MHz,
V
CC
= 5.5 V,
all other inputs
≤
0.2 V or
≥
(V
CC
-0.2 V)
All
Input leakage current any
input
Off state output leakage
current
Output high voltage
Output low voltage
Input capacitance
Output capacitance
Functional Testing
See footnotes at end of table.
I
ILK
I
OLK
V
OH
V
OL
C
IN
C
OUT
V
CC
= 5.5 V,
V
IN
= 0 V to 5.5 V
V
CC
= 5.5 V,
V
IN
= 0 V to 5.5 V
I
OUT
= -4.0 mA, V
CC
= 4.5 V,
V
IL
= 0.8 V, V
IH
= 2.2 V
I
OUT
= 8.0 mA, V
CC
= 4.5 V,
V
IL
= 0.8 V, V
IH
= 2.2 V
V
IN
= 0V
f = 1.0 MHz, T
A
= +25°C,
See 4.3.1c
See 4.3.1d
4
7, 8A, 8B
2.4
±10
µA
±10
V
0.4
10.0
pF
12.0
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-88681
SHEET
D
4
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions
-55°C
≤
T
C
≤+125°C
unless otherwise specified 2/
See figure 4
Group A
subgroups
Device
Type
Limits
Min
9, 10, 11
01
02
03
04
05
06
Read cycle time
t
AVAV
See figure 4
3/
01
02
03
04
05
06
Address access time
t
AVQV
See figure 4
4/
01
02
03
04
05
06
Output hold after address
change
Chip enable to output active
Chip disable to output
inactive
t
AVQX
t
ELQX
t
EHQZ
See figure 4
See figure 4
5/ 6/
All
All
01, 02
03
04
05, 06
Chip enable to power up
See footnotes at end of table.
t
ELPU
See figure 4
5/
All
3.0
3.0
0
0
0
0
0
20
25
30
10
35
45
55
70
25
20
35
45
55
70
25
20
Max
35
45
55
70
25
20
ns
Unit
Chip enable access time
t
ELQV
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-88681
SHEET
D
5
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