LTC1657
Parallel 16-Bit Rail-to-Rail
Micropower DAC
FEATURES
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DESCRIPTIO
16-Bit Monotonic Over Temperature
Deglitched Rail-to-Rail Voltage Output: 8nV•s
5V Single Supply Operation
I
CC
: 650µA Typ
Maximum DNL Error:
±1LSB
Settling Time: 20µs to
±1LSB
Internal or External Reference
Internal Power-On Reset to Zero Volts
Asynchronous CLR Pin
Output Buffer Configurable for Gain of 1 or 2
Parallel 16-Bit or 2-Byte Double Buffered Interface
Narrow 28-Lead SSOP Package
Multiplying Capability
The LTC
®
1657 is a complete single supply, rail-to-rail
voltage output, 16-bit digital-to-analog converter (DAC) in
a 28-pin SSOP or PDIP package. It includes a rail-to-rail
output buffer amplifier, an internal 2.048V reference and
a double buffered parallel digital interface.
The LTC1657 operates from a 4.5V to 5.5V supply. It has
a separate reference input pin that can be driven by an
external reference. The full-scale output can be 1 or 2
times the reference voltage depending on how the X1/X2
pin is connected.
The LTC1657 is similar to Linear Technology Corporation’s
LTC1450 12-bit V
OUT
DAC family allowing an upgrade
path. It is the only buffered 16-bit parallel DAC in a 28-lead
SSOP package and includes an onboard reference for
stand alone performance.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
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Instrumentation
Digital Calibration
Industrial Process Control
Automatic Test Equipment
Communication Test Equipment
BLOCK DIAGRA
19 D15 (MSB)
18
17
16
15
14
13
12
11 D7
10
9
8
7
6
5
4 D0 (LSB)
3 CSMSB
FROM
MICROPROCESSOR
DECODE LOGIC
1 WR
2 CSLSB
28 LDAC
FROM
SYSTEM RESET
27 CLR
5V
23
REFOUT
REFERENCE
2.048V
22
REFHI
24
V
CC
MSB
8-BIT
INPUT
REGISTER
25 0V TO
4.096V
DIFFERENTIAL NONLINEARITY (LSB)
DATA IN FROM
MICROPROCESSOR
DATA BUS
D8
16-BIT
DAC
REGISTER
16-BIT
DAC
+
–
V
OUT
LSB
8-BIT
INPUT
REGISTER
R
R
POWER-ON
RESET
GND
20
REFLO
21
X1/X2
26
1657 TA01
U
Differential Nonlinearity
vs Input Code
1.0
0.8
0.6
0.4
0.2
0.0
–0.2
–0.4
–0.6
–0.8
–1.0
0
16384
32768
49152
DIGITAL INPUT CODE
65535
1657 G01
W
U
1
LTC1657
ABSOLUTE
MAXIMUM
RATINGS
(Note 1)
PACKAGE/ORDER INFORMATION
TOP VIEW
WR
CSLSB
CSMSB
(LSB) D0
D1
D2
D3
D4
D5
1
2
3
4
5
6
7
8
9
28 LDAC
27 CLR
26 X1/X2
25 V
OUT
24 V
CC
23 REFOUT
22 REFHI
21 REFLO
20 GND
19 D15 (MSB)
18 D14
17 D13
16 D12
15 D11
GN PACKAGE
28-LEAD PLASTIC SSOP
V
CC
to GND .............................................. – 0.5V to 7.5V
TTL Input Voltage, REFHI, REFLO,
X1/X2 ....................................................... – 0.5V to 7.5V
V
OUT
, REFOUT ............................ – 0.5V to (V
CC
+ 0.5V)
Operating Temperature Range
LTC1657C ............................................. 0°C to 70°C
LTC1657I ........................................ – 40°C to 85°C
Maximum Junction Temperature .......................... 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
LTC1657CGN
LTC1657CN
LTC1657IGN
LTC1657IN
D6 10
D7 11
D8 12
D9 13
D10 14
N PACKAGE
28-LEAD PDIP
T
JMAX
= 125°C,
θ
JA
= 95°C/ W (G)
T
JMAX
= 125°C,
θ
JA
= 58°C/ W (N)
Consult factory for Military grade parts.
The
q
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 4.5V to 5.5V, V
OUT
unloaded, REFOUT tied to REFHI,
REFLO tied to GND, X1/X2 tied to GND, unless otherwise noted.
SYMBOL
PARAMETER
Resolution
Monotonicity
DNL
INL
ZSE
V
OS
V
OS
TC
Differential Nonlinearity
Integral Nonlinearity
Zero Scale Error
Offset Error
Offset Error Tempco
Gain Error
Gain Error Drift
Power Supply
V
CC
I
CC
Positive Supply Voltage
Supply Current
Short-Circuit Current Low
Short-Circuit Current High
Output Impedance to GND
Output Line Regulation
For Specified Performance
4.5V
≤
V
CC
≤
5.5V (Note 4)
V
OUT
Shorted to GND
V
OUT
Shorted to V
CC
Input Code = 0
Input Code = 65535, V
CC
= 4.5V to 5.5V
q
q
q
ELECTRICAL CHARACTERISTICS
CONDITIONS
q
q
MIN
16
16
TYP
MAX
UNITS
Bits
Bits
DAC (Note 2)
Guaranteed Monotonic (Note 3)
(Note 3)
Measured at Code 200
q
q
q
q
±0.5
±4
0
±0.3
±5
±2
0.5
4.5
650
70
80
40
±1.0
±12
2
±3
±16
µV/°C
LSB
ppm/°C
5.5
1200
120
140
120
4
V
µA
mA
mA
Ω
mV/V
Op Amp DC Performance
q
q
q
q
2
U
W
U
U
W W
W
LSB
LSB
mV
mV
LTC1657
The
q
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 4.5V to 5.5V, V
OUT
unloaded, REFOUT tied to REFHI,
REFLO tied to GND, X1/X2 tied to GND, unless otherwise noted.
SYMBOL
PARAMETER
Voltage Output Slew Rate
Voltage Output Settling Time
Digital Feedthrough
Midscale Glitch Impulse
Output Voltage Noise Spectral Density
Digital I/O
V
IH
V
IL
V
OH
V
OL
I
LEAK
C
IN
t
CS
t
WR
t
CWS
t
CWH
t
DWS
t
DWH
t
LDAC
t
CLR
Digital Input High Voltage
Digital Input Low Voltage
Digital Output High Voltage
Digital Output Low Voltage
Digital Input Leakage
Digital Input Capacitance
CS (MSB or LSB) Pulse Width
WR Pulse Width
CS to WR Setup
CS to WR Hold
Data Valid to WR Setup
Data Valid to WR Hold
LDAC Pulse Width
CLR Pulse Width
Reference Output Voltage
Reference Output
Temperature Coefficient
Reference Line Regulation
Reference Load Regulation
Short-Circuit Current
Reference Input
REFHI, REFLO Input Range
(Note 6) See Applications Information
X1/X2 Tied to V
OUT
X1/X2 Tied to GND
q
q
q
q
q
q
q
ELECTRICAL CHARACTERISTICS
CONDITIONS
(Note 5)
(Note 5) to 0.0015% (16-Bit Settling Time)
(Note 5) to 0.012% (13-Bit Settling Time)
DAC Switch Between 8000
H
and 7FFF
H
At 1kHz
q
MIN
±0.3
TYP
±0.7
20
10
0.3
8
250
MAX
UNITS
V/µs
µs
µs
nV •s
nV •s
nV/√Hz
V
AC Performance
2.4
0.8
V
CC
– 1
0.4
±10
10
V
V
V
µA
pF
ns
ns
ns
ns
ns
ns
ns
ns
V
IN
= GND to V
CC
(Note 6)
q
Switching Characteristics
q
q
q
q
q
q
q
q
40
40
0
0
40
0
40
40
2.036
2.048
15
2.060
Reference Output (REFOUT)
q
V
ppm/°C
V
CC
= 4.5V to 5.5V
Measured at I
OUT
= 100µA
REFOUT Shorted to GND
q
q
q
±1.5
5
50
100
mV/V
mV/A
mA
0
0
16
25
V
CC
– 1.5
V
CC
/2
V
V
kΩ
REFHI Input Resistance
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
External reference REFHI = 2.2V. V
CC
= 5V.
Note 3:
Nonlinearity is defined from code 128 to code 65535 (full scale).
See Applications Information.
Note 4:
Digital inputs at 0V or V
CC
.
Note 5:
DAC switched between all 1s and all 0s.
Note 6:
Guaranteed by design. Not subject to test.
3
LTC1657
TYPICAL PERFOR A CE CHARACTERISTICS
Differential Nonlinearity
1.0
DIFFERENTIAL NONLINEARITY (LSB)
0.8
0.6
0.4
0.2
0.0
–0.2
–0.4
–0.6
–0.8
–1.0
0
16384
32768
49152
DIGITAL INPUT CODE
65535
1657 G01
INTEGRAL NONLINEARITY (LSB)
1
0
–1
–2
–3
–4
–5
0
16384
32768
49152
DIGITAL INPUT CODE
65535
1657 G02
V
CC
– V
OUT
(V)
Minimum Output Voltage vs
Output Sink Current
1.2
OUTPUT PULL-DOWN VOLTAGE (V)
1.0
0.8
0.6
25°C
0.4
0.2
0
–55°C
CODE ALL 0’S
∆V
OUT
≤
1LSB
4.110
4.105
FULL-SCALE VOLTAGE (V)
125°C
OFFSET (mV)
0
5
10
OUTPUT SINK CURRENT (mA)
Supply Current vs Logic Input
Voltage
8
7
SUPPLY CURRENT (mA)
SUPPLY CURRENT (µA)
640
620
600
580
560
540
V
CC
= 5.5V
V
CC
= 5V
V
CC
= 4.5V
5
4
3
2
1
0
0
1
2
3
4
LOGIC INPUT VOLTAGE (V)
5
1657 G07
OUTPUT VOLTAGE (V)
6
4
U W
15
1657 G04
Integral Nonlinearity
5
4
3
2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
Minimum Supply Headroom for
Full Output Swing vs Load Current
CODE ALL 1’S
∆V
OUT
≤
1LSB
125°C
25°C
–55°C
0
5
LOAD CURRENT (mA)
10
1657 G03
Full-Scale Voltage vs
Temperature
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
4.080
–55
–25
5
35
65
TEMPERATURE (°C)
95
125
1657 G05
Offset Error vs Temperature
4.100
4.095
4.090
4.085
0
–55
–10
35
80
TEMPERATURE (°C)
125
1657 G06
Supply Current vs Temperature
700
680
660
Large-Signal Transient Response
5
V
OUT
UNLOADED
T
A
= 25°C
4
3
2
1
520
500
–55 –35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
1657 G08
0
TIME (20µs/DIV)
1657 G09
LTC1657
PIN FUNCTIONS
WR (Pin 1):
Write Input (Active Low). Used with CSMSB
and/or CSLSB to control the input registers. While WR and
CSMSB and/or CSLSB are held low, data writes into the
input register.
CSLSB (Pin 2):
Chip Select Least Significant Byte (Active
Low). Used with WR to control the LSB 8-bit input regis-
ters. While WR and CSLSB are held low, the LSB byte
writes into the LSB input register. Can be connected to
CSMSB for simultaneous loading of both sets of input
latches on a 16-bit bus.
CSMSB (Pin 3):
Chip Select Most Significant Byte (Active
Low). Used with WR to control the MSB 8-bit input
registers. While WR and CSMSB are held low, the MSB
byte writes into the MSB input register. Can be connected
to CSLSB for simultaneous loading of both sets of input
latches on a 16-bit bus.
D0 to D7 (Pins 4 to 11):
Input data for the Least Significant
Byte. Written into LSB input register when WR = 0 and
CSLSB = 0.
D8 to D15 (Pins 12 to 19):
Input data for the Most Signifi-
cant Byte. Written into MSB input register when WR = 0
and CSMSB = 0.
GND (Pin 20):
Ground.
REFLO (Pin 21):
Lower input terminal of the DAC’s inter-
nal resistor ladder. Typically connected to Analog Ground.
An input code of (0000)
H
will connect the positive input of
the output buffer to this end of the ladder. Can be used to
offset the zero scale above ground.
REFHI (Pin 22):
Upper input terminal of the DAC’s internal
resistor ladder. Typically connected to REFOUT. An input
code of (FFFF)
H
will connect the positive input of the
output buffer to 1LSB below this voltage.
REFOUT (Pin 23):
Output of the internal 2.048V reference.
Typically connected to REFHI to drive internal DAC resistor
ladder.
V
CC
(Pin 24):
Positive Power Supply Input. 4.5V
≤
V
CC
≤
5.5V. Requires a 0.1µF bypass capacitor to ground.
V
OUT
(Pin 25):
Buffered DAC Output.
X1/X2 (Pin 26):
Gain Setting Resistor Pin. Connect to GND
for G = 2 or to V
OUT
for G = 1. This pin should always be
tied to a low impedance source, such as ground or V
OUT
,
to ensure stability of the output buffer when driving
capacitive loads.
CLR (Pin 27):
Clear Input (Asynchronous Active Low). A
low on this pin asynchronously resets all input and DAC
registers to 0s.
LDAC (Pin 28):
Load DAC (Asynchronous Active Low).
Used to asynchronously transfer the contents of the input
registers to the DAC register which updates the output
voltage. If held low, the DAC register loads data from the
input registers which will immediately update V
OUT
.
U
U
U
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