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LMV841/LMV841Q/LMV842/LMV842Q/LMV844/LMV844Q CMOS Input, RRIO, Wide Supply Range
Operational Amplifiers
LMV841/LMV841Q/LMV842/
LMV842Q/LMV844/LMV844Q
October 12, 2009
CMOS Input, RRIO, Wide Supply Range Operational
Amplifiers
General Description
The LMV841/LMV842/LMV844 are low-voltage and low-pow-
er operational amplifiers that operate with supply voltages
ranging from 2.7V to 12V and have rail-to-rail input and output
capability. Their low offset voltage, low supply current, and
MOS inputs make them ideal for sensor interface and battery-
powered applications.
The single LMV841 is offered in the space-saving 5-Pin SC70
package, the dual LMV842 in the 8-Pin MSOP and 8-Pin
SOIC packages, and the quad LMV844 in the 14-Pin TSSOP
and 14-Pin SOIC packages. These small packages are ideal
solutions for area-constrained PC boards and portable elec-
tronics.
The LMV841Q, LMV842Q, and LMV844Q incorporate en-
hanced manufacturing and support processes for the auto-
motive market , including defect detection methodologies.
Reliability qualification is compliant with the requirements and
temperature grades defined in the AEC-Q100 standard.
Features
Unless otherwise noted, typical values at T
A
= 25°C, V
+
= 5V.
■
Space saving 5-Pin SC70 package
■
Supply voltage range 2.7V to 12V
■
Guaranteed at 3.3V, 5V and ±5V
1mA per channel
■
Low supply current
4.5MHz
■
Unity gain bandwidth
133dB
■
Open loop gain
500μV
max
■
Input offset voltage
0.3pA
■
Input bias current
112dB
■
CMRR
Input voltage noise
20nV/
√
Hz
■
−40°C to 125°C
■
Temperature range
■
Rail-to-Rail input
■
Rail-to-Rail output
■
The LMV841Q, LMV842Q, and LMV844Q are AEC-
Q100 grade 1 qualified and are manufactured on auto-
motive grade flow.
Applications
■
■
■
■
■
■
High impedance sensor interface
Battery powered instrumentation
High gain amplifiers
DAC buffer
Instrumentation amplifiers
Active filters
Typical Applications
20168301
© 2009 National Semiconductor Corporation
201683
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LMV841/LMV841Q/LMV842/LMV842Q/LMV844/LMV844Q
Absolute Maximum Ratings
(Note
1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note
2)
Human Body Model
Machine Model
V
IN
Differential
Supply Voltage (V
+
– V
−
)
Voltage at Input/Output Pins
Input Current
Storage Temperature Range
Junction Temperature (Note
3)
2 kV
200V
±300 mV
13.2V
+
+0.3V, V
−
−0.3V
V
10 mA
−65°C to +150°C
+150°C
(Note
4)
Soldering Information
Infrared or Convection (20 sec)
Wave Soldering Lead Temp. (10 sec)
235°C
260°C
Operating Ratings
Temperature Range (Note
3)
Supply Voltage (V
+
– V
−
)
(Note
1)
−40°C to +125°C
2.7V to 12V
334 °C/W
205 °C/W
126 °C/W
110 °C/W
93 °C/W
Package Thermal Resistance [θ
JA
(Note
3)]
5-Pin SC70
8-Pin MSOP
8-Pin SOIC
14-Pin TSSOP
14-Pin SOIC
3.3V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for T
A
= 25°C, V
+
= 3.3V, V
−
= 0V, V
CM
= V
+
/2, and R
L
> 10MΩ to V
+
/2.
Boldface
limits apply at the temperature extremes.
Symbol
V
OS
TCV
OS
I
B
I
OS
Parameter
Input Offset Voltage
Input Offset Voltage Drift (Note
7)
Input Bias Current
(Note
7, Note 8)
Input Offset Current
Common Mode Rejection Ratio
LMV841
Common Mode Rejection Ratio
LMV842 and LMV844
Power Supply Rejection Ratio
Input Common-Mode Voltage Range
0V
≤
V
CM
≤
3.3V
0V
≤
V
CM
≤
3.3V
2.7V
≤
V
+
≤
12V, V
O
= V
+
/2
CMRR
≥
50 dB
R
L
= 2 kΩ
V
O
= 0.3V to 3.0V
R
L
= 10 kΩ
V
O
= 0.2V to 3.1V
R
L
= 2 kΩ to V
+
/2
R
L
= 10 kΩ to V
+
/2
R
L
= 2 kΩ to V
+
/2
R
L
= 10 kΩ to V
+
/2
Sourcing V
O
= V
+
/2
V
IN
= 100 mV
Sinking V
O
= V
+
/2
V
IN
= −100 mV
Per Channel
A
V
= +1, V
O
= 2.3 V
PP
10% to 90%
20
15
20
15
84
80
77
75
86
82
–0.1
100
96
100
96
123
131
52
28
65
33
32
27
0.93
1.5
2
80
120
50
70
100
120
65
75
Conditions
Min
(Note
6)
Typ
(Note
5)
±50
0.5
0.3
40
112
106
108
3.4
Max
(Note
6)
±500
±800
±5
10
300
Units
μV
μV/°C
pA
fA
dB
dB
dB
V
dB
dB
mV
mV
mV
mV
mA
mA
mA
V/μs
MHz
CMRR
PSRR
CMVR
A
VOL
Large Signal Voltage Gain
Output Swing High,
(measured from V
+
)
V
O
Output Swing Low,
(measured from V
−
)
I
O
Output Short Circuit Current
(Note
3, Note 9)
I
S
SR
GBW
Supply Current
Slew Rate (Note
10)
Gain Bandwidth Product
2.5
4.5
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2
LMV841/LMV841Q/LMV842/LMV842Q/LMV844/LMV844Q
Symbol
Φ
m
e
n
R
OUT
THD+N
C
IN
Phase Margin
Parameter
Conditions
Min
(Note
6)
Typ
(Note
5)
67
20
70
0.005
7
Max
(Note
6)
Units
Deg
nV/
Ω
%
pF
Input-Referred Voltage Noise
Open Loop Output Impedance
Total Harmonic Distortion + Noise
Input Capacitance
f = 1 kHz
f = 3 MHz
f = 1 kHz , A
V
= 1
R
L
= 10 kΩ
5V Electrical Characteristics
(Note
4)
Unless otherwise specified, all limits are guaranteed for T
A
= 25°C, V
+
= 5V, V
−
= 0V, V
CM
= V
+
/2, and R
L
> 10MΩ to V
+
/2.
Boldface
limits apply at the temperature extremes.
Symbol
V
OS
TCV
OS
I
B
I
OS
Parameter
Input Offset Voltage
Input Offset Voltage Drift (Note
7)
Input Bias Current
(Note
7, Note 8)
Input Offset Current
Common Mode Rejection Ratio
LMV841
Common Mode Rejection Ratio
LMV842 and LMV844
Power Supply Rejection Ratio
Input Common-Mode Voltage Range
0V
≤
V
CM
≤
5V
0V
≤
V
CM
≤
5V
2.7V
≤
V
+
≤
12V, V
O
= V
+
/2
CMRR
≥
50 dB
R
L
= 2 kΩ
V
O
= 0.3V to 4.7V
R
L
= 10 kΩ
V
O
= 0.2V to 4.8V
R
L
= 2 kΩ to V
+
/2
R
L
= 10 kΩ to V
+
/2
R
L
= 2 kΩ to V
+
/2
R
L
= 10 kΩ to V
+
/2
Sourcing V
O
= V
+
/2
V
IN
= 100 mV
Sinking V
O
= V
+
/2
V
IN
= −100 mV
Per Channel
A
V
= +1, V
O
= 4 V
PP
10% to 90%
20
15
20
15
86
80
81
79
86
82
−0.2
100
96
100
96
125
133
68
32
78
38
33
28
0.96
1.5
2
100
120
50
70
120
140
70
80
Conditions
Min
(Note
6)
Typ
(Note
5)
±50
0.35
0.3
40
112
106
108
5.2
Max
(Note
6)
±500
±800
±5
10
300
Units
μV
μV/°C
pA
fA
dB
dB
dB
V
dB
dB
mV
mV
mV
mV
mA
mA
mA
V/μs
MHz
Deg
nV/
Ω
CMRR
PSRR
CMVR
A
VOL
Large Signal Voltage Gain
Output Swing High,
(measured from V
+
)
V
O
Output Swing Low,
(measured from V
-
)
I
O
Output Short Circuit Current
(Note
3, Note 9)
I
S
SR
GBW
Φ
m
e
n
R
OUT
Supply Current
Slew Rate (Note
10)
Gain Bandwidth Product
Phase Margin
Input-Referred Voltage Noise
Open Loop Output Impedance
2.5
4.5
67
f = 1 kHz
f = 3 MHz
20
70
3
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LMV841/LMV841Q/LMV842/LMV842Q/LMV844/LMV844Q
Symbol
THD+N
C
IN
Parameter
Total Harmonic Distortion + Noise
Input Capacitance
Conditions
f = 1 kHz , A
V
= 1
R
L
= 10 kΩ
Min
(Note
6)
Typ
(Note
5)
0.003
6
Max
(Note
6)
Units
%
pF
±5V Electrical Characteristics
(Note
4)
Unless otherwise specified, all limits are guaranteed for T
A
= 25°C, V
+
= 5V, V
−
= –5V, V
CM
= 0V, and R
L
> 10MΩ to V
CM
.
Boldface
limits apply at the temperature extremes.
Symbol
V
OS
TCV
OS
I
B
I
OS
Parameter
Input Offset Voltage
Input Offset Voltage Drift (Note
7)
Input Bias Current
(Note
7, Note 8)
Input Offset Current
Common Mode Rejection Ratio
LMV841
Common Mode Rejection Ratio
LMV842 and LMV844
Power Supply Rejection Ratio
Input Common-Mode Voltage Range
–5V
≤
V
CM
≤
5V
–5V
≤
V
CM
≤
5V
2.7V
≤
V
+
≤
12V, V
O
= 0V
CMRR
≥
50 dB
R
L
= 2kΩ
V
O
= −4.7V to 4.7V
R
L
= 10kΩ
V
O
= −4.8V to 4.8V
R
L
= 2kΩ to 0V
R
L
= 10kΩ to 0V
R
L
= 2kΩ to 0V
R
L
= 10kΩ to 0V
Sourcing V
O
= 0V
V
IN
= 100 mV
Sinking V
O
= 0V
V
IN
= −100 mV
Per Channel
A
V
= +1, V
O
= 9V
PP
10% to 90%
20
15
20
15
86
80
86
80
86
82
−5.2
100
96
100
96
126
136
95
44
105
52
37
29
1.03
1.7
2
130
155
75
95
160
200
80
100
Conditions
Min
(Note
6)
Typ
(Note
5)
±50
0.25
0.3
40
112
106
108
5.2
Max
(Note
6)
±500
±800
±5
10
300
Units
μV
μV/°C
pA
fA
dB
dB
dB
V
dB
dB
mV
mV
mV
mV
mA
mA
mA
V/μs
MHz
Deg
nV/
Ω
%
pF
CMRR
PSRR
CMVR
A
VOL
Large Signal Voltage Gain
Output Swing High,
(measured from V
+
)
V
O
Output Swing Low,
(measured from V
−
)
I
O
Output Short Circuit Current
(Note
3, Note 9)
I
S
SR
GBW
Φ
m
e
n
R
OUT
THD+N
C
IN
Supply Current
Slew Rate (Note
10)
Gain Bandwidth Product
Phase Margin
Input-Referred Voltage Noise
Open Loop Output Impedance
Total Harmonic Distortion + Noise
Input Capacitance
2.5
4.5
67
f = 1kHz
f = 3MHz
f = 1kHz , A
V
= 1
R
L
= 10kΩ
20
70
0.006
3
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4