4M x 32-Bit Dynamic RAM Module
HYM 324020S/GS-60/-70
Preliminary Information
•
4 194 304 words by 32-bit organization
(alternative 8 388 608 words by 16-bit)
Fast access and cycle time
60 ns access time
110 ns cycle time (-60 version)
70 ns access time
130 ns cycle time (-70 version)
Fast page mode capability
40 ns cycle time (-60 version)
45 ns cycle time (-70 version)
Single + 5 V (± 10 %) supply
Low power dissipation
max. 4840 mW active
(HYM 324020S/GS-60)
max. 4400 mW active
(HYM 324020S/GS-70)
CMOS – 44 mW standby
TTL – 88 mW standby
•
•
CAS-before-RAS refresh
RAS-only-refresh
Hidden-refresh
8 decoupling capacitors mounted on
substrate
All inputs, outputs and clocks fully TTL
compatible
72 pin Single in-Line Memory Module with
22.86 mm (900 mil) height
Utilizes eight 4Mx4-DRAMs in 300mil wide
SOJ-packages
2048 refresh cycles / 32 ms
Tin-Lead contact pads (S - version)
Gold contact pads (GS - version)
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Ordering Information
Type
HYM 324020S-60
HYM 324020S-70
HYM 324020GS-60
HYM 324020GS-70
Ordering Code
Q67100-Q979
Q67100-Q980
Q67100-Q2005
on request
Package
L-SIM-72-12
L-SIM-72-12
L-SIM-72-12
L-SIM-72-12
Description
DRAM Module
(access time 60 ns)
DRAM Module
(access time 70 ns)
DRAM Module
(access time 60 ns)
DRAM Module
(access time 70 ns)
Semiconductor Group
571
09.94
HYM 324020S/GS-60/-70
4M x 32-Bit
The HYM 324020S/GS-60/-70 is a 16 M Byte DRAM module organized as 4 194 304 words by
32-bit in a 72-pin single-in-line package comprising eight HYB 5117400BJ 4M x 4 DRAMs in 300
mil wide SOJ-packages mounted together with eight 0.2
µF
ceramic decoupling capacitors on a PC
board.
The HYM 324020S/GS-60/-70 can also be used as a 8 388 608 words by 16-bits dynamic RAM
module by means of connecting DQ0 and DQ16, DQ1 and DQ17, DQ2 and DQ18, …, DQ15 and
DQ31, respectively.
Each HYB 5117400BJ is described in the data sheet and is fully electrical tested and processed
according to SIEMENS standard quality procedure prior to module assembly. After assembly onto
the board, a further set of electrical tests is performed.
The speed of the module can be detected by the use of four presence detect pins.
The common I/O feature on the HYM 324020S/GS-60/-70 dictates the use of early write cycles.
Pin Definitions and Functions
Pin No.
A0-A10
DQ0-DQ31
CAS0 - CAS3
RAS0, RAS2
WE
Functions
Address Inputs for
HYM 324020S/GS
Data Input/Output
Column Address Strobe
Row Address Strobe
Read/Write Input
Power (+ 5 V)
Ground
Presence Detect Pin
No Connection
V
CC
V
SS
PD
N.C.
Presence Detect Pins
-60
PD0
PD1
PD2
PD3
-70
V
SS
N.C.
N.C.
N.C.
V
SS
N.C.
V
SS
N.C.
Semiconductor Group
572
HYM 324020S/GS-60/-70
4M x 32-Bit
Pin Configuration
(top view)
Semiconductor Group
573
HYM 324020S/GS-60/-70
4M x 32-Bit
Block Diagram
Semiconductor Group
574
HYM 324020S/GS-60/-70
4M x 32-Bit
Absolute Maximum Ratings
Operation temperature range ......................................................................................... 0 to + 70 ˚C
Storage temperature range......................................................................................... – 55 to 125 ˚C
Soldering temperature ............................................................................................................ 260 ˚C
Soldering time ............................................................................................................................. 10 s
Input/output voltage ........................................................................ – 0.5 V to min (
V
CC
+ 0.5, 7.0) V
Power supply voltage...................................................................................................... – 1 to + 7 V
Power dissipation................................................................................................................... 6.16 W
Data out current (short circuit) ................................................................................................ 50 mA
Note:Stresses
above those listed under "Absolute Maximum Ratings" may cause permanent
damage of the device. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
DC Characteristics
1)
T
A
= 0 to 70 ˚C,
V
CC
= 5 V
±
10 %
Parameter
Input high voltage
Input low voltage
Output high voltage (
I
OUT
= – 5 mA)
Output low voltage (
I
OUT
= 4.2 mA)
Input leakage current
(0 V <
V
IN
< 6.5 V, all other pins = 0 V)
Output leakage current
(DO is disabled, 0 V <
V
OUT
< 5.5 V)
Symbol
Limit Values
min.
max.
2.4
– 0.5
2.4
–
– 20
– 10
Unit
Test
Condition
V
IH
V
IL
V
OH
V
OL
I
I(L)
I
O(L)
V
CC
+ 0.5 V
0.8
–
0.4
20
10
V
V
V
µA
µA
I
CC1
Average
V
CC
supply current
(RAS, CAS, address cycling,
t
RC
=
t
RC
min)
60 ns - Version
70 ns - Version
Standby
V
CC
supply current
(RAS = CAS =
V
IH
)
Average
V
CC
supply current
during RAS only refresh cycles
(RAS cycling, CAS =
V
IH
,
t
RC
=
t
RC
min)
60 ns - Version
70 ns - Version
–
–
–
880
800
16
mA
mA
mA
2)
3)
I
CC2
I
CC3
–
–
880
800
mA
mA
2)
Semiconductor Group
575
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