To all our customers
Regarding the change of names mentioned in the document, such as
Hitachi Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were
transferred to Renesas Technology Corporation on April 1st 2003.
These operations include microcomputer, logic, analog and discrete devices,
and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors,
and other Hitachi brand names are mentioned in the document, these names
have in fact all been changed to Renesas Technology Corp.
Thank you for your understanding. Except for our corporate trademark,
logo and corporate statement, no changes whatsoever have been made to the
contents of the document, and these changes do not constitute any alteration
to the contents of the document itself.
Renesas Technology Home Page: www.renesas.com
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
Renesas Technology Corp.
H8/3877N Series
H8/3877N, H8/3876N, H8/3875N
Hardware Manual
Preface
The H8/300L Series of single-chip microcomputers has a high-speed H8/300L CPU core, with
many necessary peripheral system functions on-chip. The H8/300L CPU instruction set is
compatible with the H8/300 CPU.
On-chip peripheral functions of the H8/3877N Series include a high-precision DTMF generator
for tone dialing, a multitone generator, three types of timers, two serial communication interface
channels, and an A/D converter.
This manual describes the hardware of the H8/3877N Series. For details on the H8/3877N Series
instruction set, refer to the
H8/300L Series Programming Manual.
Contents
Section 1
1.1
1.2
1.3
Overview
..........................................................................................................
Overview.........................................................................................................................
Internal Block Diagram ..................................................................................................
Pin Arrangement and Functions .....................................................................................
1.3.1 Pin Arrangement.................................................................................................
1.3.2 Pin Functions ......................................................................................................
1
1
5
6
6
8
Section 2
2.1
CPU
................................................................................................................... 13
13
13
14
14
15
15
15
17
17
18
19
20
20
22
26
28
30
31
31
33
37
39
40
42
42
43
45
45
46
46
46
2.2
2.3
2.4
2.5
2.6
2.7
Overview.........................................................................................................................
2.1.1 Features...............................................................................................................
2.1.2 Address Space.....................................................................................................
2.1.3 Register Configuration........................................................................................
Register Descriptions......................................................................................................
2.2.1 General Registers................................................................................................
2.2.2 Control Registers ................................................................................................
2.2.3 Initial Register Values.........................................................................................
Data Formats...................................................................................................................
2.3.1 Data Formats in General Registers .....................................................................
2.3.2 Memory Data Formats ........................................................................................
Addressing Modes ..........................................................................................................
2.4.1 Addressing Modes ..............................................................................................
2.4.2 Effective Address Calculation ............................................................................
Instruction Set.................................................................................................................
2.5.1 Data Transfer Instructions ..................................................................................
2.5.2 Arithmetic Operations ........................................................................................
2.5.3 Logic Operations ................................................................................................
2.5.4 Shift Operations ..................................................................................................
2.5.5 Bit Manipulations ...............................................................................................
2.5.6 Branching Instructions........................................................................................
2.5.7 System Control Instructions ...............................................................................
2.5.8 Block Data Transfer Instruction .........................................................................
Basic Operational Timing ...............................................................................................
2.6.1 Access to On-Chip Memory (RAM, ROM) .......................................................
2.6.2 Access to On-Chip Peripheral Modules .............................................................
CPU States ......................................................................................................................
2.7.1 Overview.............................................................................................................
2.7.2 Program Execution State ...................................................................................
2.7.3 Program Halt State..............................................................................................
2.7.4 Exception-Handling State...................................................................................
2.8
2.9
Memory Map ..................................................................................................................
2.8.1 Memory Map ......................................................................................................
Application Notes ...........................................................................................................
2.9.1 Notes on Data Access .........................................................................................
2.9.2 Notes on Bit Manipulation..................................................................................
2.9.3 Notes on Use of the EEPMOV Instruction .........................................................
47
47
48
48
50
56
Section 3
3.1
3.2
Exception Handling
...................................................................................... 57
57
57
57
57
58
59
59
61
69
70
71
76
77
77
78
3.3
3.4
Overview.........................................................................................................................
Reset ............................................................................................................................
3.2.1 Overview.............................................................................................................
3.2.2 Reset Sequence ...................................................................................................
3.2.3 Interrupt Immediately after Reset.......................................................................
Interrupts.........................................................................................................................
3.3.1 Overview.............................................................................................................
3.3.2 Interrupt Control Registers .................................................................................
3.3.3 External Interrupts ..............................................................................................
3.3.4 Internal Interrupts ...............................................................................................
3.3.5 Interrupt Operations............................................................................................
3.3.6 Interrupt Response Time.....................................................................................
Application Notes ...........................................................................................................
3.4.1 Notes on Stack Area Use ....................................................................................
3.4.2 Notes on Rewriting Port Mode Registers ...........................................................
Section 4
4.1
Clock Pulse Generators
............................................................................... 81
81
81
81
82
85
87
88
4.2
4.3
4.4
4.5
Overview.........................................................................................................................
4.1.1 Block Diagram....................................................................................................
4.1.2 System Clock and Subclock ...............................................................................
System Clock Generator .................................................................................................
Subclock Generator ........................................................................................................
Prescalers ........................................................................................................................
Note on Oscillators .........................................................................................................
Section 5
5.1
5.2
Power-Down Modes
..................................................................................... 89
89
92
95
95
95
96
96
5.3
Overview.........................................................................................................................
5.1.1 System Control Registers ...................................................................................
Sleep Mode .....................................................................................................................
5.2.1 Transition to Sleep Mode....................................................................................
5.2.2 Clearing Sleep Mode ..........................................................................................
Standby Mode.................................................................................................................
5.3.1 Transition to Standby Mode ...............................................................................
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