UT1553 BCRTMP
F
EATURES
p
Comprehensive MIL-STD-1553 dual-redundant Bus
p
p
p
p
p
Controller (BC) and Remote Terminal (RT) functions
Multiple message processing capability in BC and
RT modes
Time tagging and message logging in RT mode
Automatic polling and intermessage delay in
BC mode
Programmable interrupt scheme and internally
generated interrupt history list
Remote terminal operations in ASD/ENASD-certified
(SEAFAC)
p
Register-oriented architecture to enhance
p
p
programmability
DMA memory interface with 64K addressability
Eight mode select inputs configure the device for a
wide variety of 1553 protocols: MIL-STD-1553A,
MIL-STD-1553B, McDonnell Douglas A3818,
A5232, A5690, Grumman Aerospace SP-G-151A
Comprehensive Built-In-Test (BIT) includes:
Continuous on-line wrap-around test, off-line BIT,
special system wrap-around test
Available in 144-pin pingrid array or 132-lead flatpack
packages
Standard Microcircuit Drawing 5962-89577 available
- QML Q compliant
p
p
p
REGISTERS
MASTER
RESET
HIGH-PRIORITY
STD PRIORITY LEVEL
STD PRIORITY PULSE
INTERRUPT
HANDLER
BC PROTOCOL
&
MESSAGE
HANDLER
BUS
TRANSFER
LOGIC
CONTROL
STATUS
CURRENT BC BLOCK/
RT DESCRIPTOR SPACE
POLLING COMPARE
BUILT-IN-TEST WORD
CURRENT COMMAND
INTERRUPT LOG
LIST POINTER
16
HIGH-PRIORITY
INTERRUPT ENABLE
HIGH-PRIORITY
INTERRUPT STATUS
16
RT PROTOCOL
&
MESSAGE
HANDLER
BUILT-
IN-
TEST
16
STANDARD INTERRUPT
ENABLE
RT ADDRESS
BUILT-IN-TEST
START COMMAND
RESET COMMAND
RT TIMER
RESET COMMAND
ACTIVITY STATUS/
OPERATIONAL MODE
ADDRESS
PROGRAMMABLE STATUS
16
16
DATA
12MHz
CLOCK &
RESET
LOGIC
1553
DATA
CHANNEL
A
1553
DATA
CHANNEL
B
WRAP-AROUNDTEST
MULTIPLEXER
DUAL
CHANNEL
ENCODER/
DECODER
MODULE
PARALLEL-
TO-SERIAL
CONVER-
SION
SERIAL-TO-
PARALLEL
CONVER-
SION
16
TIMRONA
TIMRONB
TIMEOUT
ADDRESS
GENERATOR
16
DMA/CPU
CONTROL
16
DMA ARBITRATION
REGISTER CONTROL
DUAL-PORT MEMORY CONTROL
Figure 1. BCRTMP BlockDiagram
BCRTMP-1
UT1553 BCRTMP
F
EATURES
p
Comprehensive MIL-STD-1553 dual-redundant Bus
p
p
p
p
p
Controller (BC) and Remote Terminal (RT) functions
Multiple message processing capability in BC and
RT modes
Time tagging and message logging in RT mode
Automatic polling and intermessage delay in
BC mode
Programmable interrupt scheme and internally
generated interrupt history list
Remote terminal operations in ASD/ENASD-certified
(SEAFAC)
p
Register-oriented architecture to enhance
p
p
programmability
DMA memory interface with 64K addressability
Eight mode select inputs configure the device for a
wide variety of 1553 protocols: MIL-STD-1553A,
MIL-STD-1553B, McDonnell Douglas A3818,
A5232, A5690, Grumman Aerospace SP-G-151A
Comprehensive Built-In-Test (BIT) includes:
Continuous on-line wrap-around test, off-line BIT,
special system wrap-around test
Available in 144-pin pingrid array or 132-lead flatpack
packages
Standard Microcircuit Drawing 5962-89501 available
- QML Q compliant
p
p
p
REGISTERS
MASTER
RESET
HIGH-PRIORITY
STD PRIORITY LEVEL
STD PRIORITY PULSE
INTERRUPT
HANDLER
BC PROTOCOL
&
MESSAGE
HANDLER
BUS
TRANSFER
LOGIC
CONTROL
STATUS
CURRENT BC BLOCK/
RT DESCRIPTOR SPACE
POLLING COMPARE
BUILT-IN-TEST WORD
CURRENT COMMAND
INTERRUPT LOG
LIST POINTER
16
HIGH-PRIORITY
INTERRUPT ENABLE
HIGH-PRIORITY
INTERRUPT STATUS
16
RT PROTOCOL
&
MESSAGE
HANDLER
BUILT-
IN-
TEST
16
STANDARD INTERRUPT
ENABLE
RT ADDRESS
BUILT-IN-TEST
START COMMAND
RESET COMMAND
RT TIMER
RESET COMMAND
ACTIVITY STATUS/
OPERATIONAL MODE
ADDRESS
PROGRAMMABLE STATUS
16
16
DATA
12MHz
CLOCK &
RESET
LOGIC
1553
DATA
CHANNEL
A
1553
DATA
CHANNEL
B
WRAP-AROUNDTEST
MULTIPLEXER
DUAL
CHANNEL
ENCODER/
DECODER
MODULE
PARALLEL-
TO-SERIAL
CONVER-
SION
SERIAL-TO-
PARALLEL
CONVER-
SION
16
TIMRONA
TIMRONB
TIMEOUT
ADDRESS
GENERATOR
16
DMA/CPU
CONTROL
16
DMA ARBITRATION
REGISTER CONTROL
DUAL-PORT MEMORY CONTROL
Figure 1. BCRTMP BlockDiagram
BCRTMP-1
Table of Contents
1.0
INTRODUCTION.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Features - Remote Terminal (RT) Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2
Features - Bus Controller (BC) Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3
Features - Multiple Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
PIN IDENTIFICATION AND DESCRIPTION.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
INTERNAL REGISTERS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
SYSTEM OVERVIEW.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SYSTEM INTERFACE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.1
DMA Transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.2
Hardware Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.3
CPU Interconnection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.4
RAM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.5
Legalization Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.6
Transmitter/Receiver Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
REMOTE TERMINAL ARCHITECTURE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.1
RT Functional Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.1.1 RT Subaddress Descriptor Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.1.2 Message Status Word . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6.1.3 Mode Code Descriptor Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.2
RT Error Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.3
RT Operational Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
BUS CONTROLLER ARCHITECTURE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
7.1
BC Functional Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
7.2
Polling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
7.3
BC Error Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
7.4
BC Operational Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
7.5
BC Operational Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
MULTIPLE PROTOCOL OPTIONS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
8.1
Operational Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
8.1.1 Legalization Select (RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
8.1.2 Broadcast Option Select (BC, RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
8.1.3 RT Response Time Select (RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
8.1.4 Mode Code Option Select (BC, RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
8.1.5 Status Word Option Select (RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
8.1.6 Message Error Technique Select (RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
8.1.7 Mode code with Data Select (BC, RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
8.1.8 Remote Terminal Time Out Option Select (BC, RT) . . . . . . . . . . . . . . . . . . 43
8.2
Additional UT1553 BCRTMP Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
8.2.1 DOMC Do Mode Code Control Signal (RT) . . . . . . . . . . . . . . . . . . . . . . . . . 43
8.2.2 Continuous Wrap-Around Circuitry (BC, RT) . . . . . . . . . . . . . . . . . . . . . . . 44
8.2.3 Stop Enable (BC, RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8.2.4 Forced Busy (RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8.2.5 ACTIVE Signal (RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8.2.6 Transmitter Inhibit Signals (BC, RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8.2.7 Immediate Clear Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
8.2.8 Status Word Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
EXCEPTION HANDLING AND INTERRUPT LOGGING
. . . . . . . . . . . . . . . . . . . . 46
MAXIMUM AND RECOMMENDED OPERATING CONDITIONS
. . . . . . . . . . . . 50
DC ELECTRICAL CHARACTERISTICS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
AC ELECTRICAL CHARACTERISTICS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
PACKAGE OUTLINE DRAWINGS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
11.0
12.0
13.0
BCRTMP-2
1.0 I
NTRODUCTION
The monolithic CMOS UT1553 BCRTMP provides the
system designer with an intelligent solution to
MIL-STD-1553 multiplexed serial data bus design
problems. The UT1553 BCRTMP is a single-chip device
that implements two of the three defined MIL-STD-1553
functions - Bus Controller and Remote Terminal - and is
flexible enough to conform to many of the MIL-STD-1553
“industry standards” created between and including releases
of MIL-STD-1553A and MIL-STD-1553B. Designed to
reduce host CPU overhead, the BCRTMP’s powerful state
machines automatically execute message transfers, provide
interrupts, and generate status information. The BCRTMP’s
register-based architecture allows it to conform to the many
protocol options regarding status words, mode codes, use
of Broadcast, Message Error, and RT Response Time as
specified in the various “1553 standards.” Multiple registers
offer many programmable functions as well as extensive
information for host use. In the BC mode, the BCRTMP
uses a linked-list message scheme to provide the host with
message chaining capability. The BCRTMP enhances
memory use by supporting variable-size, relocatable data
blocks. In the RT mode, the BCRTMP implements time-
tagging and message history functions. It also supports
multiple (up to 128) message buffering and variable length
messages to any subaddress.
The UT1553 BCRTMP is an intelligent, versatile, and easy
to implement device -- a powerful asset to system designers.
1.1 Features - Remote Terminal (RT) Mode
Indexing
The BCRTMP is programmable to index or buffer messages
on a subaddress-by-subaddress basis. The BCRTMP, which
can index as many as 128 messages, can also assert an
interrupt when either the selected number of messages is
reached or every time a specified subaddress is accessed.
Variable Space Allocation
The BCRTMP can use as little or as much memory (up to
64K) as needed.
Selectable Data Storage
Address programmability within the BCRTMP provides
flexible data placement and convenient access.
Sequential Data Storage
The BCRTMP stores/retrieves, by subaddress, all messages
in the order in which they are transacted.
Sequential Message Status Information
The BCRTMP provides message validity, time-tag, and
word-count information, and stores it sequentially in a
separate, cross-referenced list.
Illegalizing Mode Codes and Subaddresses
The host can declare mode codes and subaddresses illegal
by setting the appropriate bit(s) in memory.
Programmable Interrupt Selection
The host CPU can select various events to cause an interrupt
with provision for high and standard priority interrupts.
Interrupt History List
The BCRTMP provides an Interrupt History List that
records, in the order of occurrence, the events that caused
the interrupts. The list length is programmable.
1.2 Features - Bus Controller (BC) Mode
Multiple Message Processing
The BCRTMP autonomously processes any number of
messages or lists of messages that may be stored in a 64K
memory space.
Automatic Intermessage Delay
When programmed by the host, the BCRTMP can delay a
host-specified time before executing the next message in
sequence.
Automatic Polling
When polling, the BCRTMP interrogates the remote
terminals and then compares their status word responses to
the contents of the Polling Compare Register. The BCRTMP
can interrupt the host CPU if an erroneous remote terminal
status word response occurs.
Automatic Retry
The BCRTMP can automatically retry a message on busy,
message error, and/or response time-out conditions. The
BCRTMP can retry up to four times on the same or on the
alternate bus.
Programmable Interrupt Selection
The host CPU can select various events to cause an interrupt
with provision for high and standard priority interrupts.
Interrupt History List
The BCRTMP provides an Interrupt History List that
records, in the order of occurrence, the events that caused
the interrupts. The list length is programmable.
Variable Space Allocation
The BCRTMP uses as little or as much memory (up to 64K)
as needed.
Selectable Data Storage
Address programmability within the BCRTMP provides
flexible data placement and convenient access.
BCRTMP-3
1.3 Features - Multiple Protocol
Since the inception of the loosely defined MIL-STD-1553A
in 1973, various “1553 standards” have developed, all with
their own peculiarities. The UT1553 BCRTMP addresses
MIL-STD-1553A, MIL-STD-1553B, McDonnell Douglas
A3818, McDonnell Douglas A5232, McDonnell Douglas
A5690, and Grumman Aerospace SP-G-151A. While the
part was designed with these “standards” specifically in
mind, the BCRTMP’s flexibility permits conformance to
nearly any conceivable “1553-like standard.” The basic
differences among the various “standards” fall into five
categories:
1) Status Word Definition
2) Mode Code Definition
3) Use of Broadcast
4) Message Error Handling
5) Remote Terminal (RT) Response Time
Status Word Definition
The BCRTMP can operate in a mode where the status word
is defined in strict conformance with MIL-STD-1553B, or
it can operate in a more flexible mode. In this flexible status
word mode, the user can program the individual status word
bits using internal registers.
Mode Code Definition
The designer can place the BCRTMP in an operational mode
so that the device performs in strict conformance with the
mode code definitions for MIL-STD-1553B. The designer
may also opt not to automatically execute mode codes,
providing flexibility in mode code definition and
illegalization.
Use of Broadcast
The BCRTMP has a programmable mode option that allows
the user to determine whether to allow broadcast commands
in a system.
Message Error Handling
Some 1553 protocols (e. g., MIL-STD-1553B) consider any
message error reason to discard the entire message and
suppress status word transmission, while others
(e. g., McDonnell Douglas A3818) define the required
activity according to message error severity. The BCRTMP
can be programmed to conform to either requirement.
Remote Terminal (RT) Response Time
The BCRTMP offers two methods of legalization (Bus
Legalization and DMA Legalization), which the designer
selects depending on the required RT response time.
BCRTMP-4
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