FINAL
COM’L: -7.5/10/12/15/20
IND: -10/12/14/18/24
MACH211SP-7/10/12/15/20
High-Density EE CMOS Programmable Logic
DISTINCTIVE CHARACTERISTICS
s
JTAG-Compatible, 5-V in-system programming
s
44 Pins
s
64 Macrocells
s
7.5 ns t
PD
Commercial
10 ns t
PD
Industrial
s
133 MHz f
CNT
s
34 Bus-Friendly™ Inputs and I/Os
s
Peripheral Component Interconnect (PCI)
compliant (-7/-10)
s
Programmable power-down mode
s
32 Outputs
s
64 Flip-flops; 2 clock choices
s
4 “PAL26V16” blocks with buried macrocells
s
Improved routing over the MACH210
IN-SYSTEM PROGRAMMING
In-system programming allows the MACH211SP to be
programmed while soldered onto a system board. Pro-
gramming the MACH211SP in-system yields numer-
ous benefits at all stages of development: prototyping,
manufacturing, and in the field. Since insertion into a
programmer isn’t needed, multiple handling steps and
the resulting bent leads are eliminated. The design can
be modified in-system for design changes and debug-
ging while prototyping, programming boards in produc-
tion, and field upgrades.
The MACH211SP offers advantages not available in
other CPLD architectures with in-system programming.
MACH devices have extensive routing resources for
pin-out retention; design changes resulting in pin-out
changes for other CPLDs cancel the advantages of
in-system programming. The MACH211SP can be em-
ployed in any JTAG (IEEE 1149.1) compliant chain.
GENERAL DESCRIPTION
The MACH211SP is a member of AMD’s EE CMOS
Performance Plus MACH
®
2 device family. This device
has approximately six times the logic macrocell capa-
bility of the popular PAL22V10 without loss of speed.
The MACH211SP consists of four PAL
®
blocks inter-
connected by a programmable switch matrix. The four
PAL blocks are essentially “PAL26V16” structures com-
plete with product-term arrays and programmable
macrocells, which can be programmed as high speed
or low power, and buried macrocells. The switch matrix
connects the PAL blocks to each other and to all input
pins, providing a high degree of connectivity between
the fully-connected PAL blocks. This allows designs to
be placed and routed efficiently.
The MACH211SP has two kinds of macrocell: output
and buried. The MACH211SP output macrocell pro-
vides registered, latched, or combinatorial outputs with
programmable polarity. If a registered configuration is
chosen, the register can be configured as D-type or
T-type to help reduce the number of product terms. The
register type decision can be made by the designer or
by the software. All output macrocells can be con-
nected to an I/O cell. If a buried macrocell is desired,
the internal feedback path from the macrocell can be
used, which frees up the I/O pin for use as an input.
The MACH211SP has dedicated buried macrocells
which, in addition to the capabilities of the output
macrocell, also provide input registers or latches for
use in synchronizing signals and reducing setup time
requirements.
The MACH211SP is an enhanced version of the
MACH211, adding the JTAG-compatible in-system pro-
gramming feature.
Publication#
20405
Rev:
B
Amendment/0
Issue Date:
February 1996
ORDERING INFORMATION
Commercial Products
AMD programmable logic products for commercial applications are available with several ordering options. The order number
(Valid Combination) is formed by a combination of:
MACH
211
SP
-7
J
C
FAMILY TYPE
MACH = Macro Array CMOS High-Speed
OPTIONAL PROCESSING
Blank = Standard Processing
DEVICE NUMBER
211 = 64 Macrocells, 44 Pins,
Power-Down mode,
Bus-Friendly Inputs and I/Os
PRODUCT DESIGNATION
SP = In-system Programmable
OPERATING CONDITIONS
C = Commercial (0°C to +70°C)
PACKAGE TYPE
J = 44-Pin Plastic Leaded Chip
Carrier (PL 044)
V = 44-Pin Thin Quad Flat Pack
(PQT044)
SPEED
-7 = 7.5 ns t
PD
-10 = 10 ns t
PD
-12 = 12 ns t
PD
-15 = 15 ns t
PD
-20 = 20 ns t
PD
Valid Combinations
MACH211SP-7
MACH211SP-10
MACH211SP-12
MACH211SP-15
MACH211SP-20
JC, VC
Valid Combinations
The Valid Combinations table lists configurations planned to
be supported in volume for this device. Consult the local AMD
sales office to confirm availability of specific valid combina-
tions and to check on newly released combinations.
MACH211SP-7/10/12/15/20 (Com’l)
5
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