◆CMOS
◆Mini
Mold Package
◆Highly
Accurate
: ± 2%
◆Built-In
Delay Circuit
①1ms
~ 50ms
②50ms
~ 200ms
③80ms
~ 400ms
◆Low
Power Consumption
: 1.0μA (TYP.) [V
IN
= 2.0V]
■APPLICATIONS
●Microprocessor
reset circuitry
●Memory
battery back-up circuits
●Power-on
reset circuits
●Power
failure detection
●System
battery life and charge voltage monitors
●Delay
circuitry
■GENERAL
DESCRIPTION
The XC61F series are highly accurate, low power
consumption voltage detectors, manufactured using
CMOS and laser trimming technologies. A delay circuit
is built-in to each detector.
Detect voltage is extremely accurate with minimal
temperature drift.
Both CMOS and N-channel open drain output
configurations are available.
Since the delay circuit is built-in, peripherals are
unecessary and high density mounting is possible.
■FEATURES
Highly Accurate
: ± 2%
Low Power Consumption
: 1.0
μ
A(TYP.)[ VIN=2.0V ]
Detect Voltage Range
: 1.6V ~ 6.0V in 100mV increments
Operating Voltage Range
: 0.7V ~ 10.0V
Detect Voltage Temperature Characteristics
:±100ppm/℃(TYP.)
Built-In Delay Circuit
:
①1ms
~ 50ms
②50ms
~ 200ms
③80ms
~ 400ms
Output Configuration
: N-channel open drain or CMOS
Ultra Small Packages
: SOT-23(150mW) mini-mold
: SOT-89 (500mW) mini-power mold
: TO-92 (300mW)
* No parts are available with an accuracy of ± 1%
■TYPICAL
APPLICATION CIRCUITS
■TYPICAL
PERFORMANCE
CHARACTERISTICS
Ambient Temperature:Ta(℃)
89
XC61F
Series
■PRODUCT
CLASSIFICATION
●Ordering
Information
XC61F
①②③④⑤⑥⑦
DESIGNATOR
①
② ③
DESCRIPTION
Output Configuration
Detect Voltage
SYMBOL
C
N
16 ~ 60
1
④
⑤
Output Delay
Detect Accuracy
2
3
1
M
⑥
Package
P
T
L
R
⑦
Device Orientation
L
H
B
DESCRIPTION
: CMOS output
: N-ch open drain output
: e.g. 2.5V
→ ②2
,
③5
: e.g. 3.8V
→ ②3
,
③8
: 1ms ~ 200ms
: 80ms ~ 400ms
: 1ms ~ 50ms
: Within
±
2.0%
: SOT-23
: SOT-89
: TO-92 (Standard)
: TO-92 (Custom pin configuration)
: Embossed tape, Standard feed
: Embossed tape, Reverse feed
: Paper type ( TO-92)
: Bag : ( TO-92 )
■PACKAGING
INFORMATION
●SOT-23
91
XC61F
Series
■MARKING
RULE
●SOT-23,
SOT-89
3
②
①
③
④
① ② ③ ④
1
2
1
2
3
①Represents
integer of detect voltage and output configuration
CMOS output (XC61FC series)
N-channel open drain (XC61FN series)
MARK
CONFIGURATION
VOLTAGE(V)
MARK
CONFIGURATION VOLTAGE(V)
A
CMOS
0. X
K
N-ch
0. X
B
CMOS
1. X
L
N-ch
1. X
C
CMOS
2. X
M
N-ch
2. X
D
CMOS
3. X
N
N-ch
3. X
E
CMOS
4. X
P
N-ch
4. X
F
CMOS
5. X
R
N-ch
5. X
H
CMOS
6. X
S
N-ch
6. X
②Represents
decimal number of detect voltage
MARK
0
1
2
3
4
VOLTAGE(V)
X.0
X.1
X.2
X.3
X.4
DESIGNATOR VOLTAGE(V)
5
X.5
6
X.6
7
X.7
8
X.8
9
X.9
③Represents
delay time
VOLTAGE(V)
5
6
7
DELAY TIME
50 to 200ms
80 to 400ms
1 to 50ms
④Represents
assembly lot number
(Based on internal standards. )
②Represents
detect voltage
MARK
②
3
5
③
3
0
VOLTAGE
（V）
3.3
5.0
●TO-92
①Represents
output
configuration
MARK
C
N
OUTPUT
CONFIGURATION
CMOS
N-ch
④Represents
delay time
MARK
1
4
5
DELAY TIME
500ms∼200ms
80ms∼400ms
1ms∼50ms
⑤Represents
detect voltage accuracy
MARK
2
DETECT VOLTAGE ACCURACY
Within
±
2%
⑥Represents
a least significant digit of
the production year
MARK
3
4
PRODUCTION YEAR
2003
2004
⑦Represents
production lot number
0 to 9, A to Z repeated (G,I,J,O,Q,W excepted)
93
嵌入式系统
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