a
FEATURES
Low Offset Voltage: 200 V max
High Current Gain: 400 min
Excellent Current Gain Match: 2% max
Low Noise Voltage at 100 Hz, 1 mA: 2.5 nV/√Hz max
Excellent Log Conformance: rBE = 0.6 max
Matching Guaranteed for All Transistors
Available in Die Form
Matched Monolithic
Quad Transistor
MAT04
PIN CONNECTIONS
14-Lead Cerdip (Y Suffix)
14-Lead Plastic DIP (P Suffix)
14-Lead SO (S Suffix)
PRODUCT DESCRIPTION
The MAT04 is a quad monolithic NPN transistor that offers ex-
cellent parametric matching for precision amplifier and nonlin-
ear circuit applications. Performance characteristics of the
MAT04 include high gain (400 minimum) over a wide range of
collector current, low noise (2.5 nV/√Hz maximum at 100 Hz,
I
C
= 1 mA) and excellent logarithmic conformance. The
MAT04 also features a low offset voltage of 200
µV
and tight
current gain matching, to within 2%. Each transistor of the
MAT04 is individually tested to data sheet specifications. For
matching parameters (offset voltage, input offset current, and
gain match), each of the dual transistor combinations are
verified to meet stated limits. Device performance is guaranteed
at 25°C and over the industrial and military temperature ranges.
The long-term stability of matching parameters is guaranteed by
the protection diodes across the base-emitter junction of each
transistor. These diodes prevent degradation of beta and match-
ing characteristics due to reverse bias base-emitter current.
The superior logarithmic conformance and accurate matching
characteristics of the MAT04 makes it an excellent choice for
use in log and antilog circuits. The MAT04 is an ideal choice in
applications where low noise and high gain are required.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
MAT04–SPECIFICATIONS
(@ T
A
= 25 C unless otherwise noted. Each transistor is individually tested. For matching
parameters (V
OS
, I
OS
,
∆h
FE
) each dual transistor combination is verified to meet stated limits. All tests made at endpoints unless otherwise noted.)
Parameter
Current Gain
Current Gain Match
Offset Voltage
Offset Voltage Change vs.
Collector Current
Offset Voltage Change vs. V
CB
Bulk Emitter Resistance
Input Bias Current
Input Offset Current
Breakdown Voltage
Collector Saturation Voltage
Collector-Base Leakage Current
Noise Voltage Density
Symbol
h
FE
∆h
FE
V
OS
∆V
OS
/∆I
C
∆V
OS
/∆V
CB
r
BE
I
B
I
OS
BV
CEO
V
CE(SAT)
I
CBO
e
n
f
T
C
OBO
C
EBO
Conditions
10
µA ≤
I
C
≤
1 mA
0 V
≤
V
CB
≤
30 V
1
I
C
= 100
µA
0 V
≤
V
CB
≤
30 V
2
10
µA ≤
I
C
≤
1 mA
0 V
≤
V
CB
≤
30 V
3
10
µA ≤
I
C
≤
1 mA
V
CB
= 0 V
3
10
µA ≤
I
C
≤
1 mA
0 V
≤
V
CB
≤
30 V
3
10
µA ≤
I
C
≤
1 mA
V
CB
= 0 V
4
I
C
= 100
µA
0 V
≤
V
CB
≤
30 V
I
C
= 100
µA;
V
CB
= 0 V
I
C
= 10
µA
I
B
= 100
µA;
I
C
= 1 mA
V
CB
= 40 V
V
CB
= 0 V; f
O
= 10 Hz
I
C
= 1 mA; f
O
= 100 Hz
f
O
= 1 kHz
5
I
C
= 1 mA; V
CE
= 10 V
V
CB
= 15 V; I
E
= 0
f = 1 MHz
V
BE
= 0 V; I
C
= 0
f = 1 MHz
MAT04E
Min Typ Max
400
800
0.5
50
5
50
0.4
125
0.6
40
0.03
5
2
1.8
1.8
300
10
40
0.06
3
2.5
2.5
2
200
25
100
0.6
250
5
40
0.03
5
2
1.8
1.8
300
10
40
0.06
4
3
3
Min
300
MAT04F
Typ Max
600
1
100
10
100
0.4
165
2
4
400
50
200
0.6
330
13
%
µV
µV
µV
Ω
nA
nA
V
V
pA
nV/√Hz
nV/√Hz
nV/√Hz
MHz
pF
pF
Unit
ELECTRICAL CHARACTERISTICS
Gain Bandwidth Product
Output Capacitance
Input Capacitance
NOTES
1
Current gain measured at I
C
= 10
µA,
100
µA
and 1 mA.
2
Current gain match is defined as:
∆
h
FE
100(
∆
I
B
)(
h
FE
=
I
C
MIN
)
Measured at I
C
= 10
µA
and guaranteed by design over the specified range of I
C
.
Guaranteed by design.
5
Sample tested.
3
4
Specifications subject to change without notice.
–2–
REV. D
MAT04
ELECTRICAL CHARACTERISTICS
(at –25 C
≤
T
Parameter
Symbol
Conditions
85 C for MAT04E, –40 C
≤
T
A
85 C for MAT04F, unless
otherwise noted. Each transistor is individually tested. For matching parameters (V
OS
, I
OS
) each dual transistor combination is
verified to meet stated limits. All tests made at endpoints unless otherwise noted.)
A
MAT04E
Min Typ Max
MAT04F
Min Typ Max
Unit
Current Gain
Offset Voltage
Average Offset
Voltage Drift
Input Bias Current
Input Offset Current
Average Offset
Current Drift
Breakdown Voltage
Collector-Base
Leakage Current
Collector-Emitter
Leakage Current
Collector-Substrate
Leakage Current
h
FE
V
OS
TCV
OS
I
B
I
OS
TCI
OS
BV
CEO
I
CBO
I
CES
I
CS
10
µA ≤
I
C
≤
1 mA
0 V
≤
V
CB
≤
30 V
1
10
µA ≤
I
C
≤
1 mA
0 V
≤
V
CB
≤
30 V
2
I
C
= 100
µA
V
CB
= 0 V
3
I
C
= 100
µA
0 V
≤
V
CB
≤
30 V
I
C
= 100
µA
V
CB
= 0 V
I
C
= 100
µA
V
CB
= 0 V
I
C
= 10
µA
V
CB
= 40 V
V
CE
= 40 V
225 625
60
0.2
260
1
200 500
120 520
0.4
2
µV
µV/°C
nA
nA
pA/°C
V
nA
nA
nA
160 445
4
50
40
0.5
5
40
20
200 500
8
100
40
0.5
5
0.7
V
CS
= 40 V
0.7
REV. D
–3–
MAT04
ABSOLUTE MAXIMUM RATINGS
1
Collector-Base Voltage (BV
CBO
) . . . . . . . . . . . . . . . . . . . 40 V
Collector-Emitter Voltage (BV
CEO
) . . . . . . . . . . . . . . . . . 40 V
Collector-Collector Voltage (BV
CC
) . . . . . . . . . . . . . . . . . 40 V
Emitter-Emitter Voltage (BV
EE
) . . . . . . . . . . . . . . . . . . . 40 V
Collector Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Emitter Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Substrate (Pin-4 to Pin-11) Current . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
MAT04EY . . . . . . . . . . . . . . . . . . . . . . . . . –25°C to +85°C
MAT04FY, FP, FS . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature
Y Package . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
P Package . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
2
DICE CHARACTERISTICS
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
Q1 COLLECTOR
Q1 BASE
Q1 EMITTER
SUBSTRATE
Q2 EMITTER
Q2 BASE
Q2 COLLECTOR
Q3 COLLECTOR
Q3 BASE
Q3 EMITTER
SUBSTRATE
Q4 EMITTER
Q4 BASE
Q4 COLLECTOR
Package Type
14-Lead Cerdip
14-Lead Plastic DIP
14-Lead SO
JA
JC
Units
°C/W
°C/W
°C/W
Die Size 0.060
×
0.060 Inch, 3600 Sq. mm
(1.52
×
1.52 mm, 2.31 sq. mm)
108
83
120
16
39
36
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
JA
is specified for worst case mounting conditions, i.e.,
JA
is specified for
device in socket for cerdip and P-DIP packages;
JA
is specified for device
soldered to printed circuit board for SO package.
ORDERING GUIDE
Model
MAT04EY
*
MAT04FY
*
MAT04FP
MAT04FS
T
A
= 25 C
V
OS
max
200
µV
400
µV
400
µV
400
µV
Temperature
Range
–25°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package
Description
Cerdip
Cerdip
P-DIP-14
14-Lead SO
Package
Option
Q-14
Q-14
N-14
SO-14
NOTES
*
Not for new designs; obsolete April 2002.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the MAT04 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. D
Typical Performance Characteristics– MAT04
TPC 1. Current Gain
vs. Collector Current
TPC 2. Current Gain
vs. Temperature
TPC 3. Gain Bandwidth vs.
Collector Current
TPC 4. Base-Emitter-On-Voltage
vs. Collector Current
TPC 5. Small Signal Input Resistance
(h
ie
) vs. Collector Current
TPC 6. Small Signal Output
Conductance vs. Collector Current
TPC 7. Saturation Voltage vs.
Collector Current
TPC 8. Noise Voltage Density
vs. Frequency
TPC 9. Noise Voltage Density
vs. Collector Current
REV. D
–5–
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