19-3011; Rev 0; 10/03
KIT
ATION
EVALU
E
BL
AVAILA
15-Bit, 65Msps ADC with -79.3dBFS
Noise Floor for Baseband Applications
General Description
Features
o
65Msps Minimum Sampling Rate
o
-79.3dBFS Noise Floor
o
Excellent Dynamic Performance
76.2dB SNR at f
IN
=15MHz and A
IN
= -1dBFS
93.1dBc/95.5dBc Single-Tone SFDR1/SFDR2 at
f
IN
= 15MHz and A
IN
= -1dBFS
-91dBc Multitone SFDR at f
IN1
= 10MHz
and f
IN2
= 15MHz
o
Less than 0.25ps Sampling Jitter
o
Fully Differential Analog Input Voltage Range of
2.56V
P-P
o
CMOS-Compatible Two’s-Complement Data Output
o
Separate Data Valid Clock and Overrange Outputs
o
Flexible-Input Clock Buffer
o
EV Kit Available for the MAX1419
(Order MAX1427EVKIT)
MAX1419
The MAX1419 is a 5V, high-speed, high-performance
analog-to-digital converter (ADC) featuring a fully differ-
ential wideband track-and-hold (T/H) and a 15-bit con-
verter core. The MAX1419 is optimized for multichannel,
multimode receivers, which require the ADC to meet very
stringent dynamic performance requirements. With a
noise floor of -79.3dBFS, the MAX1427 allows for the
design of receivers with superior sensitivity.
The MAX1419 achieves two-tone, spurious-free dynamic
range (SFDR) of -91dBc for input tones of 10MHz and
15MHz. Its excellent signal-to-noise ratio (SNR) of 76.2dB
and single-tone SFDR performance (SFDR1/SFDR2) of
93.1dBc/95.5dBc at f
IN
= 15MHz and a sampling rate of
65Msps make this part ideal for high-performance digital
receivers.
The MAX1419 operates from an analog 5V and a digital
3V supply, features a 2.56V
P-P
full-scale input range,
and allows for a sampling speed of up to 65Msps. The
input T/H operates with a -1dB full-power bandwidth of
200MHz.
The MAX1419 features parallel, CMOS-compatible out-
puts in two’s-complement format. To enable the interface
with a wide range of logic devices, this ADC provides a
separate output driver power-supply range of 2.3V to
3.5V. The MAX1419 is manufactured in an 8mm x 8mm,
56-pin QFN package with exposed paddle (EP) for low
thermal resistance, and is specified for the extended
industrial (-40°C to +85°C) temperature range.
Note that IF parts MAX1418, MAX1428, and MAX1430
(see the
Pin-Compatible Higher/Lower Speed Versions
Selection
table) are recommended for applications that
require high dynamic performance for input frequen-
cies greater than f
CLK
/3. The MAX1419 is optimized for
input frequencies of less than f
CLK
/3.
Ordering Information
PART
MAX1419ETN
*
EP
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
56 QFN-EP*
= Exposed paddle.
Applications
Cellular Base-Station Transceiver Systems (BTS)
Wireless Local Loop (WLL)
Single- and Multicarrier Receivers
Multistandard Receivers
E911 Location Receivers
Power Amplifier Linearity Correction
Antenna Array Processing
Pin-Compatible Higher/Lower
Speed Versions Selection
PART
MAX1418
MAX1419
MAX1427
MAX1428*
MAX1429*
MAX1430*
SPEED GRADE
(Msps)
65
65
80
80
100
100
TARGET
APPLICATION
IF
Baseband
Baseband
IF
Baseband
IF
Pin Configuration appears at end of data sheet.
*
Future
product—contact factory for availability.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
15-Bit, 65Msps ADC with -79.3dBFS
Noise Floor for Baseband Applications
MAX1419
ABSOLUTE MAXIMUM RATINGS
AV
CC
, DV
CC
, DRV
CC
to GND.................................. -0.3V to +6V
INP, INN, CLKP, CLKN, CM to GND........-0.3V to (AV
CC
+ 0.3V)
D0–D14, DAV, DOR to GND..................-0.3V to (DRV
CC
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
56-Pin QFN (derate 47.6mW/°C above +70°C) ......3809.5mW
Operating Temperature Range ...........................-40°C to +85°C
Thermal Resistance
θ
J
A
...................................................21°C/W
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AV
CC
= 5V, DV
CC
= DRV
CC
= 2.5V, GND = 0, INP and INN driven differentially with -1dBFS, CLKP and CLKN driven differentially
with a 2V
P-P
sinusoidal input signal, C
L
= 5pF at digital outputs, f
CLK
= 65MHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical
values are at T
A
= +25°C, unless otherwise noted.
≥+25°C
guaranteed by production test, <+25°C guaranteed by design and char-
acterization.)
PARAMETER
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
ANALOG INPUT (INP, INN)
Differential Input Voltage Range
Common-Mode Input Voltage
Differential Input Resistance
Differential Input Capacitance
Full-Power Analog Bandwidth
CONVERSION RATE
Maximum Clock Frequency
Minimum Clock Frequency
Aperture Jitter
CLOCK INPUT (CLKP, CLKN)
Full-Scale Differential Input
Voltage
Common-Mode Input Voltage
Differential Input Resistance
Differential Input Capacitance
DYNAMIC CHARACTERISTICS
Thermal + Quantization
Noise Floor
Signal-to-Noise Ratio (Note 1)
NF
Analog input <-35dBFS
f
IN
= 5MHz at -1dBFS
SNR
f
IN
= 15MHz at -1dBFS
f
IN
= 25MHz at -1dBFS
73.5
-79.3
76.5
76.1
76
dB
dBFS
V
DIFFCLK
V
CM
R
INCLK
C
INCLK
Fully differential input drive, V
CLKP
- V
CLKN
Self-biased
0.5 to
3.0
2.4
2
±15%
1
V
V
kΩ
pF
f
CLK
f
CLK
t
AJ
65
20
0.21
MHz
MHz
ps
RMS
V
DIFF
V
CM
R
IN
C
IN
FPBW
-1dB
-1dB rolloff for a full-scale input
Fully differential inputs drive, V
DIFF
= V
INP
- V
INN
Self-biased
2.56
3.38
1
±15%
1
200
V
P-P
V
kΩ
pF
MHz
INL
DNL
f
IN
= 15MHz
f
IN
= 15MHz, no missing codes guaranteed
-12
-4
15
±1.5
±0.4
+12
+4
Bits
LSB
LSB
mV
%FS
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
15-Bit, 65Msps ADC with -79.3dBFS
Noise Floor for Baseband Applications
ELECTRICAL CHARACTERISTICS (continued)
(AV
CC
= 5V, DV
CC
= DRV
CC
= 2.5V, GND = 0, INP and INN driven differentially with -1dBFS, CLKP and CLKN driven differentially
with a 2V
P-P
sinusoidal input signal, C
L
= 5pF at digital outputs, f
CLK
= 65MHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical
values are at T
A
= +25°C, unless otherwise noted.
≥+25°C
guaranteed by production test, <+25°C guaranteed by design and char-
acterization.)
PARAMETER
Signal-to-Noise and Distortion
(Note 1)
Spurious-Free Dynamic Range
(HD2 and HD3)
(Note 1)
Spurious-Free Dynamic Range
(HD4 and Higher)
(Note 1)
Two-Tone Intermodulation
Distortion
Two-Tone Spurious-Free
Dynamic Range
Digital Output Voltage Low
Digital Output Voltage High
SYMBOL
CONDITIONS
f
IN
= 5MHz at -1dBFS
f
IN
= 15MHz at -1dBFS
f
IN
= 25MHz at -1dBFS
f
IN
= 5MHz at -1dBFS
SFDR1
f
IN
= 15MHz at -1dBFS
f
IN
= 25MHz at -1dBFS
f
IN
= 5MHz at -1dBFS
SFDR2
f
IN
= 15MHz at -1dBFS
f
IN
= 25MHz at -1dBFS
TTIMD
SFDR
TT
f
IN1
= 10MHz at -7dBFS;
f
IN2
= 15MHz at -7dBFS
f
IN1
= 10MHz at -10dBFS < f
IN1
< -100dBFS;
f
IN2
= 15MHz at -10dBFS < f
IN2
< -100dBFS
85.5
84
73
MIN
TYP
76.3
75.9
74.3
96.5
93.5
80.5
94.5
94.5
93.2
-91
-105
dBc
dBFS
dBc
dBc
dB
MAX
UNITS
MAX1419
DIGITAL OUTPUTS (D0–D14, DAV, DOR)
V
OL
V
OH
DV
CC
-
0.5
0.5
V
V
TIMING CHARACTERISTICS (DV
CC
= DRV
CC
= 2.5V)
Figure 4
CLKP/CLKN Duty Cycle
Effective Aperture Delay
Output Data Delay
Data Valid Delay
Pipeline Latency
CLKP Rising Edge to DATA
Not Valid
CLKP Rising Edge to DATA
Valid (Guaranteed)
DATA Setup Time
(Before DAV Rising Edge)
DATA Hold Time
(After DAV Rising Edge)
Duty cycle
t
AD
t
DAT
t
DAV
t
LATENCY
t
DNV
t
DGV
t
SETUP
t
HOLD
(Note 3)
(Note 3)
(Note 3)
(Note 3)
2.6
3.4
t
CLKP
-
0.5
(Note 3)
(Note 3)
3
5.3
50
±5
230
4.5
6.5
3
3.8
5.2
t
CLKP
+ 1.3
5.7
8.6
t
CLKP
+ 2.4
7.5
8.7
%
ps
ns
ns
Clock
cycles
ns
ns
ns
ns
t
CLKN
- t
CLKN
- t
CLKN
-
3.6
2.8
2.0
_______________________________________________________________________________________
3
15-Bit, 65Msps ADC with -79.3dBFS
Noise Floor for Baseband Applications
MAX1419
ELECTRICAL CHARACTERISTICS (continued)
(AV
CC
= 5V, DV
CC
= DRV
CC
= 2.5V, GND = 0, INP and INN driven differentially with -1dBFS, CLKP and CLKN driven differentially
with a 2V
P-P
sinusoidal input signal, C
L
= 5pF at digital outputs, f
CLK
= 65MHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical
values are at T
A
= +25°C, unless otherwise noted.
≥+25°C
guaranteed by production test, <+25°C guaranteed by design and char-
acterization.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
50
±5
230
(Note 3)
(Note 3)
2.8
5.3
4.1
6.3
3
(Note 3)
(Note 3)
(Note 3)
(Note 3)
2.5
3.2
t
CLKP
+ 0.2
3.4
4.4
t
CLKP
+ 1.7
5.2
7.4
t
CLKP
+ 2.8
6.5
8.6
MAX
UNITS
TIMING CHARACTERISTICS (DV
CC
= DRV
CC
= 3.3V)
Figure 4
CLKP/CLKN Duty Cycle
Effective Aperture Delay
Output Data Delay
Data Valid Delay
Pipeline Latency
CLKP Rising Edge to
DATA Not Valid
CLKP Rising Edge to
DATA Valid (Guaranteed)
DATA Setup Time
(Before DAV Rising Edge)
DATA Hold Time
(After DAV Rising Edge)
POWER REQUIREMENTS
Analog Supply Voltage Range
Digital Supply Voltage Range
Output Supply Voltage Range
Analog Supply Current
Digital + Output Supply Current
Analog Power Dissipation
AV
CC
DV
CC
DRV
CC
I
AVCC
I
DVCC
+
PDISS
(Note 2)
(Note 2)
f
CLK
= 65MHz, C
LOAD
= 5pF
5
±3%
2.3 to 3.5
2.3 to 3.5
377
35.5
1974
440
42
V
V
V
mA
mA
mW
Duty cycle
t
AD
t
DAT
t
DAV
t
LATENCY
t
DNV
t
DGV
t
SETUP
t
HOLD
%
ps
ns
ns
Clock
cycles
ns
ns
ns
ns
t
CLKN
- t
CLKN
- t
CLKN
-
3.5
2.7
2.0
Note 1:
Dynamic performance is based on a 32,768-point data record with a sampling frequency of f
SAMPLE
= 65.0117120MHz, an
input frequency of f
IN
= f
SAMPLE
x (7561/32768) = 15.001024MHz, and a frequency bin size of 1984Hz. Close-in (f
IN
±23.8kHz) and low-frequency (DC to 47.6kHz) bins are excluded from the spectrum analysis.
Note 2:
Apply the same voltage levels to DV
CC
and DRV
CC
.
Note 3:
Guaranteed by design and characterization.
4
_______________________________________________________________________________________
15-Bit, 65Msps ADC with -79.3dBFS
Noise Floor for Baseband Applications
MAX1419
Typical Operating Characteristics
(AV
CC
= 5V, DV
CC
= DRV
CC
= 2.5V, INP and INN driven differentially with a -1dBFS amplitude, CLKP and CLKN driven differentially
with a 2V
P-P
sinusoidal input signal, C
L
= 5pF at digital outputs, f
CLK
= 65MHz, T
A
= +25°C. All AC data based on a 32k-point FFT
record and under coherent sampling conditions.)
FFT PLOT (32,768-POINT DATA RECORD,
COHERENT SAMPLING)
MAX1419 toc01
FFT PLOT (32,768-POINT DATA RECORD,
COHERENT SAMPLING)
f
CLK
= 65.0117MHz
f
IN
= 15.0010MHz
A
IN
= -0.98dBFS
SNR = 76.5dB
SFDR1 = 89.1dBc
SFDR2 = 98.1dBc
HD2 = 94.8dBc
HD3 = 89dBc
MAX1419 toc02
FFT PLOT (32,768-POINT DATA RECORD,
COHERENT SAMPLING)
f
CLK
= 65.0117MHz
f
IN
= 25.0004MHz
A
IN
= -06dBFS
SNR = 76.3dB
SFDR1 = 77.9dBc
SFDR2 = 92.3dBc
HD2 = 85.6dBc
HD3 = 77.9dBc
MAX1419 toc03
0
-20
AMPLITUDE (dBFS)
-40
-60
-80
-100
-120
0
5
10
15
AMPLITUDE (dBFS)
AMPLITUDE (dBFS)
f
CLK
= 65.0117MHz
f
IN
= 10.0013MHz
A
IN
= -1.02dBFS
SNR = 76.8dB
SFDR1 = 87.7dBc
SFDR2 = 98.3dBc
HD2 = 87.7dBc
HD3 = 91.5dBc
0
-20
-40
-60
-80
-100
-120
0
-20
-40
-60
-80
-100
-120
20
25
30
0
5
10
15
20
25
30
0
5
10
15
20
25
30
ANALOG INPUT FREQUENCY (MHz)
ANALOG INPUT FREQUENCY (MHz)
ANALOG INPUT FREQUENCY (MHz)
SNR vs. ANALOG INPUT FREQUENCY
(f
CLK
= 65.0117MHz, A
IN
= -1dBFS)
MAX1419 toc04
SFDR1/SFDR2 vs. ANALOG INPUT FREQUENCY
(f
CLK
= 65.0117MHz, A
IN
= -1dBFS)
MAX1419 toc05
HD2/HD3 vs. ANALOG INPUT FREQUENCY
(f
CLK
= 65.0117MHz, A
IN
= -1dBFS)
MAX1419 toc06
78
77
76
100
95
-70
-75
HD2/HD3 (dBc)
-80
-85
HD2
-90
-95
-100
SFDR2
SFDR1/SFDR2 (dBc)
90
85
80
75
70
SFDR1
HD3
SNR (dBc)
75
74
73
72
71
70
5
15
25
35
f
IN
(MHz)
45
55
65
5
15
25
35
f
IN
(MHz)
45
55
65
5
15
25
35
f
IN
(MHz)
45
55
65
FULL-SCALE-TO-NOISE RATIO vs.
ANALOG INPUT AMPLITUDE
(f
CLK
= 65.011712MHz, f
IN
= 15.0010MHz)
MAX1419 toc07
SFDR1/SFDR2 vs. ANALOG INPUT AMPLITUDE
(f
CLK
= 65.0117MHz, f
IN
= 15.0010MHz)
MAX1419 toc08
HD2/HD3 vs. ANALOG INPUT AMPLITUDE
(f
CLK
= 65.0117MHz, f
IN
= 15.0010MHz)
-80
-90
HD2/HD3 (dBFS)
-100
-110
-120
-130
HD2
HD3
MAX1419 toc09
80
FULL-SCALE-TO-NOISE RATIO (dBFS)
79
78
77
76
75
74
73
72
71
70
-70
-60
-50
-40
-30
-20
-10
0
ANALOG INPUT AMPLITUDE (dBFS)
130
120
SFDR1/SFDR2 (dBFS)
110
100
90
80
70
-70
-60
-50
-40
-30
-20
-10
0
ANALOG INPUT AMPLITUDE (dBFS)
SFDR1
-70
SFDR2
-140
-150
-70
-60
-50
-40
-30
-20
-10
0
ANALOG INPUT AMPLITUDE (dBFS)
_______________________________________________________________________________________
5
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