This product has been retired and is not recommended for designs. Please contact your Spansion
representative for alternates. Availability of this document is retained for reference and historical
purposes only.
The following document contains information on Spansion memory products.
Continuity of Specifications
There is no change to this data sheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal data sheet improvement and are noted in the
document revision summary.
For More Information
Please contact your local sales office for additional information about Spansion memory solutions.
Publication Number
21195
Revision
E
Amendment
6
Issue Date
September 12, 2006
THIS PAGE LEFT INTENTIONALLY BLANK.
DATA SHEET
Am29F017D
16 Megabit (2 M x 8-Bit)
CMOS 5.0 Volt-only, Uniform Sector Flash Memory
This product has been retired and is not recommended for designs. Please contact your Spansion representative for alternates. Availability of this document is retained for reference
and historical purposes only.
DISTINCTIVE CHARACTERISTICS
Optimized for memory card applications
— Backwards-compatible with Am29F016C and
Am29F017B
5.0 V
±
10%, single power supply operation
— Minimizes system level power requirements
Manufactured on 0.23 µm process technology
High performance
— Access times as fast as 70 ns
Low power consumption
— 25 mA typical active read current
— 30 mA typical program/erase current
— 1 µA typical standby current (standard access
time to active mode)
Flexible sector architecture
— 32 uniform sectors of 64 Kbytes each
— Any combination of sectors can be erased.
— Supports full chip erase
— Group sector protection:
A hardware method of locking sector groups to
prevent any program or erase operations within
that sector group
Temporary Sector Group Unprotect allows code
changes in previously locked sectors
Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies bytes at specified addresses
Unlock Bypass Program Command
— Reduces overall programming time when
issuing multiple program command sequences
Minimum 1,000,000 program/erase cycles per
sector guaranteed
20-year data retention at 125°C
— Reliable operation for the life of the system
Package options
— 40-pin TSOP
— 48-pin TSOP
Compatible with JEDEC standards
— Pinout and software compatible with
single-power-supply Flash standard
— Superior inadvertent write protection
Data# Polling and toggle bits
— Provides a software method of detecting
program or erase cycle completion
Ready/Busy# output (RY/BY#)
— Provides a hardware method for detecting
program or erase cycle completion
Erase Suspend/Erase Resume
— Suspends a sector erase operation to read data
from, or program data to, a non-erasing sector,
then resumes the erase operation
Hardware reset pin (RESET#)
— Resets internal state machine to the read mode
This Data Sheet states AMD’s current technical specifications regarding the Product described herein. This Data
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
Publication#
21195
Rev:
E
Amendment:
5
Issue Date:
September 12, 2006
D A T A
S H E E T
GENERAL DESCRIPTION
The Am29F017D is a 16 Mbit, 5.0 volt-only Flash mem-
ory organized as 2,097,152 bytes. The 8 bits of data
appear on DQ0–DQ7. The Am29F017D is offered in a
40-pin or 48-pin TSOP package. This device is de-
signed to be programmed in-system with the standard
system 5.0 volt V
CC
supply. A 12.0 volt V
PP
is not re-
quired for program or erase operations. The device can
also be programmed in standard EPROM program-
mers.
This device is manufactured using AMD’s 0.23
µ
m
process technology, and offers all the features and ben-
efits of the 0.32 µm Am29F017B and the 0.5 µm
Am29F016C.
The standard device offers access times of 70, 90, 120,
and 150 ns, allowing high-speed microprocessors to
operate without wait states. To eliminate bus conten-
tion, the device has separate chip enable (CE#), write
enable (WE#), and output enable (OE#) controls.
The device requires only a
single 5.0 volt power sup-
ply
for both read and write functions. Internally gener-
ated and regulated voltages are provided for the
program and erase operations.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard.
Com-
mands are written to the command register using stan-
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