INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•
The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF40106B
gates
Hex inverting Schmitt trigger
Product specification
File under Integrated Circuits, IC04
January 1995
Philips Semiconductors
Product specification
Hex inverting Schmitt trigger
DESCRIPTION
Each circuit of the HEF40106B functions as an inverter
with Schmitt-trigger action. The Schmitt-trigger switches at
different points for the positive and negative-going input
signals. The difference between the positive-going voltage
(V
P
) and the negative-going voltage (V
N
) is defined as
hysteresis voltage (V
H
).
This device may be used for enhanced noise immunity or
to “square up” slowly changing waveforms.
HEF40106B
gates
Fig.2 Pinning diagram.
HEF40106BP(N): 14-lead DIL; plastic
(SOT27-1)
HEF40106BD(F): 14-lead DIL; ceramic (cerdip)
(SOT73)
HEF40106BT(D): 14-lead SO; plastic
(SOT108-1)
( ): Package Designator North America
Fig.1 Functional diagram.
Fig.3 Logic diagram (one inverter).
FAMILY DATA, I
DD
LIMITS category GATES
See Family Specifications
January 1995
2
Philips Semiconductors
Product specification
Hex inverting Schmitt trigger
DC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
°C
V
DD
V
Hysteresis
voltage
Switching levels
positive-going
input voltage
negative-going
input voltage
5
10
15
5
10
15
5
10
15
V
N
V
P
V
H
SYMBOL
MIN.
0,5
0,7
0,9
2
3,7
4,9
1,5
3
4
TYP.
0,8
1,3
1,8
3,0
5,8
8,3
2,2
4,5
6,5
HEF40106B
gates
MAX.
V
V
V
3,5
7
11
3
6,3
10,1
V
V
V
V
V
V
Fig.5
Fig.4 Transfer characteristic.
Waveforms showing definition of
V
P
, V
N
and V
H
, where V
N
and V
P
are
between limits of 30% and 70%.
January 1995
3
Philips Semiconductors
Product specification
Hex inverting Schmitt trigger
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
°C;
C
L
= 50 pF; input transition times
≤
20 ns
V
DD
V
Propagation delays
I
n
→
O
n
HIGH to LOW
5
10
15
5
LOW to HIGH
Output transition times
HIGH to LOW
10
15
5
10
15
5
LOW to HIGH
10
15
t
TLH
t
THL
t
PLH
t
PHL
90
35
30
75
35
30
60
30
20
60
30
20
180
70
60
150
70
60
120
60
40
120
60
40
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYMBOL
TYP.
MAX.
HEF40106B
gates
TYPICAL EXTRAPOLATION
FORMULA
63 ns
+
(0,55 ns/pF) C
L
24 ns
+
(0,23 ns/pF)
22 ns
+
(0,16 ns/pF) C
L
48 ns
+
(0,55 ns/pF) C
L
24 ns
+
(0,23 ns/pF) C
L
22 ns
+
(0,16 ns/pF) C
L
10 ns
+
(1,0 ns/pF) C
L
9 ns
+
(0,42 ns/pF) C
L
6 ns
+
(0,28 ns/pF) C
L
10 ns
+
(1,0 ns/pF) C
L
9 ns
+
(0,42 ns/pF) C
L
6 ns
+
(0,28 ns/pF) C
L
V
DD
V
Dynamic power
dissipation per
package (P)
5
10
15
TYPICAL FORMULA FOR P (µW)
2 300 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
9 000 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
20 000 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
where
f
i
= input freq. (MHz)
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
∑
(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
January 1995
4
Philips Semiconductors
Product specification
Hex inverting Schmitt trigger
HEF40106B
gates
Fig.6
Typical drain current as a function of input
voltage; V
DD
= 5 V; T
amb
= 25
°C.
Fig.7
Typical drain current as a function of input
voltage; V
DD
=10 V; T
amb
= 25
°C.
Fig.8
Typical drain current as a function of input
voltage; V
DD
= 15 V; T
amb
= 25
°C.
January 1995
5
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