INTEGRATED CIRCUITS
74F258A
Quad 2-line to 1-line selector/multiplexer,
inverting (3-State)
Product specification
IC15 Data Handbook
1996 Jan 05
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-line to 1-line selector/multiplexer, inverting
(3-State)
74F258A
FEATURES
•
Multifunction capability
•
Non-inverting data path
•
3-State outputs
•
See 74F257A for non-inverting version
DESCRIPTION
The 74F258A has four identical 2-input multiplexers with 3-State
outputs which select 4 bits of data from two sources under control of
a common Select (S) input. The I
0n
inputs are selected when the
Select input is Low and the I
1n
inputs are selected when the Select
input is High. Data appears at the outputs in inverted form.
The 74F258A is the logical implementation of a 4-pole, 2-position
switch where the position of the switch is determined by the logic
level supplied to the Select input. Outputs are forced to a High
impedance ‘‘off” state when the Output Enable input (OE) is High. All
but one device must be in the High impedance state to avoid
currents that would exceed the maximum ratings if outputs are tied
together. Design of the output signals must ensure that there is no
overlap when outputs of 3-State devices are tied together.
PIN CONFIGURATION
S
I
0a
I
1a
Y
a
I
0b
I
1b
Y
b
GND
1
2
3
4
5
6
7
8
16 V
CC
15 OE
14 I
0d
13 I
1d
12 Y
d
11
I
0c
10 I
1c
9
Y
c
SF00815
TYPE
74F258A
TYPICAL
PROPAGATION
DELAY
3.5ns
TYPICAL SUPPLY
CURRENT (TOTAL)
14mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F258AN
N74F258AD
PKG.
DWG. #
SOT38-4
SOT109-1
16-pin plastic DIP
16-pin plastic SO
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
I
0n
, I
1n
S
OE
Y
a
- Y
d
Data inputs
Common select input
Output Enable input (active Low)
Data outputs
DESCRIPTION
74F(U.L.)
HIGH/LOW
1.0/1.0
1.0/1.0
1.0/1.0
150/40
LOAD VALUE
HIGH/LOW
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
3.0mA/24mA
NOTE:
One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
2
3
5
6
11
10
14
13
LOGIC SYMBOL (IEEE/IEC)
15
I
0a
I
1a
I
0b
I
1b
I
0c
I
1c
I
0d
I
1d
1
EN
G1
1
15
S
OE
2
3
5
6
Y
a
Y
b
Y
c
Y
d
10
11
13
1
1
MUX
4
7
9
12
V
CC
=Pin 16
GND=Pin 8
4
7
9
12
14
SF00816
SF00817
1996 Jan 05
2
853-0361 16192
Philips Semiconductors
Product specification
Quad 2-line to 1-line selector/multiplexer, inverting
(3-State)
74F258A
LOGIC DIAGRAM
OE
15
I
0a
2
I
1a
3
I
0b
5
I
1b
6
I
0c
11
I
1c
10
I
0d
14
I
1d
13
S
1
FUNCTION TABLE
INPUTS
OE
S
I
0
I
1
X
L
H
X
X
OUTPUT
Y
Z
H
L
H
L
H
L
X
Z
=
=
=
=
H
X
X
L
H
X
L
H
X
L
L
L
L
L
H
High voltage level
Low voltage level
Don’t care
High impedance “off” state
4
Y
a
V
CC
=Pin 16
GND=Pin 8
7
Y
b
Y
c
9
12
Y
d
SF00818
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
48
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
0
PARAMETER
MIN
4.5
2.0
0.8
–18
–3
24
70
LIMITS
UNIT
NOM
5.0
MAX
5.5
V
V
V
mA
mA
mA
°C
1996 Jan 05
3
Philips Semiconductors
Product specification
Quad 2-line to 1-line selector/multiplexer, inverting
(3-State)
74F258A
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
V
OH
V
OL
V
IK
I
I
I
IH
I
IL
I
OZH
I
OZL
I
OS
PARAMETER
High-level output voltage
TEST
CONDITIONS
1
V
CC
= MIN, V
IL
= MAX,
V
IH
= MIN, I
OL
= MAX
Low-level output voltage
V
CC
= MIN, V
IL
= MAX,
V
IH
= MIN, I
OL
= MAX
Input clamp voltage
Input current at maximum input voltage
High-level input current
Low-level input current
Off-state output current, High-level voltage applied
Off-state output current, High-level voltage applied
Short-circuit output current
3
I
CCH
I
CC
Supply current (total)
I
CCL
I
CCZ
V
CC
= MAX
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX, V
O
= 2.7V
V
CC
= MAX, V
O
= 0.5V
V
CC
= MAX
I
1n
=4.5V, OE=I
0n
=S=GND
I
1n
=S=4.5V, OE=I
0n
=GND
I
1n
=OE=4.5V,I
0n
=S=GND
–60
8.5
17
16
±10%V
CC
±5%V
CC
±10%V
CC
±5%V
CC
MIN
2.4
2.7
3.3
0.30
0.35
–0.73
0.50
0.50
–1.2
100
20
–0.6
50
–50
–150
11.5
23
22
LIMITS
TYP
2
MAX
UNIT
V
V
V
V
V
µA
µA
mA
µA
µA
mA
mA
mA
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of High-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25°C
V
CC
= +5.0V
C
L
= 50pF, R
L
= 500Ω
MIN
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay
I
n
to Y
n
Propagation delay
S to Y
n
Output enable time
to High or Low level
Output disable time
from High or Low level
Waveform 1
Waveform 2
Waveform 3
Waveform 4
Waveform 3
Waveform 4
3.0
1.0
3.5
2.5
4.0
4.0
2.0
2.0
TYP
4.5
2.5
6.5
6.0
6.0
5.5
3.5
3.5
MAX
6.0
4.0
8.0
8.0
7.5
7.5
5.5
5.5
T
amb
= –55°C to +70°C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500Ω
MIN
2.5
1.0
3.5
2.5
3.5
3.5
2.0
2.0
MAX
7.0
4.5
9.0
9.0
8.5
8.5
6.5
6.0
ns
ns
ns
ns
ns
ns
ns
ns
UNIT
1996 Jan 05
4
Philips Semiconductors
Product specification
Quad 2-line to 1-line selector/multiplexer, inverting
(3-State)
74F258A
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
I
n
V
M
V
M
S
V
M
V
M
t
PHL
Y
n
V
M
t
PLH
V
M
Y
n
t
PHL
V
M
t
PLH
V
M
SF00819
SF00820
Waveform 1. Propagation Delay
Data and Select to Output
Waveform 2. Propagation Delay
Select to Output
OE
V
M
t
PZH
V
M
V
M
t
PHZ
V
OH
-0.3V
OE
V
M
t
PZL
V
M
t
PLZ
V
M
V
OL
+0.3V
Y
n
Y
n
0V
SF00821
SF00822
Waveform 3. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
Waveform 4. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORM
V
CC
7.0V
V
IN
PULSE
GENERATOR
R
T
D.U.T.
V
OUT
R
L
NEGATIVE
PULSE
90%
V
M
10%
t
THL (
t
f
)
C
L
R
L
t
TLH (
t
r
)
90%
POSITIVE
PULSE
10%
t
THL (
t
f
)
AMP (V)
90%
V
M
t
w
10%
0V
t
w
V
M
10%
t
TLH (
t
r
)
0V
AMP (V)
90%
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST
t
PLZ
t
PZL
All other
SWITCH
closed
closed
open
V
M
Input Pulse Definition
DEFINITIONS:
R
L
= Load resistor;
see AC electrical characteristics for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
INPUT PULSE REQUIREMENTS
family
amplitude V
M
74F
3.0V
1.5V
rep. rate
1MHz
t
w
500ns
t
TLH
2.5ns
t
THL
2.5ns
SF00777
1996 Jan 05
5
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