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74LVC16374ABQ518: 产品描述Flip Flops 74LVC16374ABQ/HUQFN60U/REEL13D; 产品类别半导体逻辑; 文件大小733KB，共20页; 制造商NXP(恩智浦); 官网地址https://www.nxp.com

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74LVC16374ABQ518概述

Flip Flops 74LVC16374ABQ/HUQFN60U/REEL13D

74LVC16374ABQ518规格参数

参数名称	属性值
产品种类 Product Category	Flip Flops
制造商 Manufacturer	NXP(恩智浦)

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74LVC16374A; 74LVCH16374A

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

Rev. 11 — 16 January 2013

Product data sheet

1. General description

The 74LVC16374A and 74LVCH16374A are 16-bit edge-triggered flip-flops featuring

separate D-type inputs with bus hold (74LVCH16374A only) for each flip-flop and 3-state

outputs for bus-oriented applications. It consists of two sections of eight positive

edge-triggered flip-flops. A clock input (nCP) and an output enable (nOE) are provided for

each octal.

The flip-flops store the state of their individual D-inputs that meet the set-up and hold time

requirements on the LOW-to-HIGH clock (CP) transition.

When pin nOE is LOW, the contents of the flip-flops are available at the outputs. When pin

nOE is HIGH, the outputs go to the high-impedance OFF-state. Operation of input nOE

does not affect the state of the flip-flops.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs. These features allow the use of these devices in mixed 3.3 V and

5 V applications.

Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused

inputs.

2. Features and benefits



5 V tolerant inputs/outputs for interfacing with 5 V logic

Wide supply voltage range from 1.2 V to 3.6 V

CMOS low power consumption

Multibyte flow-through standard pinout architecture

Low inductance multiple supply pins for minimum noise and ground bounce

Direct interface with TTL levels

All data inputs have bus hold (74LVCH16374A only)

High-impedance outputs when V

= 0 V

Complies with JEDEC standard:



JESD8-7A (1.65 V to 1.95 V)



JESD8-5A (2.3 V to 2.7 V)



JESD8-C/JESD36 (2.7 V to 3.6 V)



ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-B exceeds 200 V



CDM JESD22-C101E exceeds 1000 V



Specified from

40 C

to +85

C

and

40 C

to +125

C

74LVC16374ABQ518相似产品对比

	74LVC16374ABQ518	74LVCH16374ABQ518	74LVC16374ADGG-Q1J	74LVC16374ADL112	74LVCH16374ADL118	74LVCH16374ADL112	74LVC16374ADL-T	74LVCH16374ADL
描述	Flip Flops 74LVC16374ABQ/HUQFN60U/REEL13D	Flip Flops 74LVCH16374ABQ/HUQFN60U/REEL13	Flip Flops 74LVC16374ADGG-Q100/TSSOP48/RE	Flip Flops 3.3V 16-BIT POS	Flip Flops 16-BIT 5V TOL. I/O	Flip Flops 16-BIT 5V TOL. I/O	Flip Flops 3.3V 16-BIT POS D-TYPE 3-S	Flip Flops 16-BIT 5V TOL. I/O BUFFER D
产品种类 Product Category	Flip Flops	Flip Flops	-	Flip Flops	Flip Flops	Flip Flops	-	-
制造商 Manufacturer	NXP(恩智浦)	NXP(恩智浦)	-	NXP(恩智浦)	NXP(恩智浦)	NXP(恩智浦)	-	-

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