TC74ACT257P/F/FN
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74ACT257P,TC74ACT257F,TC74ACT257FN
2-Channel Multiplexer (3-state)
Note:
xxxFN (JEDEC SOP) is not available in
Japan.
The TC74ACT257 is an advanced high speed CMOS
MULTIPLEXER fabricated with silicon gate and double-layer
metal wiring C
2
MOS technology.
It achieve the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
This device may be used as a level converter for interfacing
TTL or NMOS to High Speed CMOS. The inputs are compatible
with TTL or NMOS and CMOS output voltage levels.
Each is composed of four independent 2-channel multiplexers
with common SELECT and OUTPUT ENABLE (
OE
).
If
OE
is set low, the outputs are held in a high-impedance
state. When SELECT is set low, “A” data inputs are enabled.
Conversely, when SELECT is high, “B” data inputs are
enabled.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
TC74ACT257P
TC74ACT257F
Features
•
•
•
•
High speed: t
pd
=
5.8 ns (typ.) at V
CC
=
5 V
Low power dissipation: I
CC
=
8
μA
(max) at Ta
=
25°C
Compatible with TTL outputs: V
IL
=
0.8 V (max)
V
IH
=
2.0 V (min)
Symmetrical output impedance: |I
OH
|
=
I
OL
=
24 mA (min)
Capability of driving 50
Ω
•
•
transmission lines.
Balanced propagation delays: t
pLH
∼
t
pHL
−
Pin and function compatible with 74F257
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
SOL16-P-150-1.27
: 1.00 g (typ.)
: 0.18 g (typ.)
: 0.13 g (typ.)
TC74ACT257FN
Pin Assignment
1
2007-10-01
TC74ACT257P/F/FN
Absolute Maximum Ratings (Note 1)
Characteristics
Supply voltage range
DC input voltage
DC output voltage
Input diode current
Output diode current
DC output current
DC V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
Rating
−0.5
to 7.0
−0.5
to V
CC
+
0.5
−0.5
to V
CC
+
0.5
±20
±50
±50
±100
500 (DIP) (Note 2)/180 (SOP)
−65
to 150
Unit
V
V
V
mA
mA
mA
mA
mW
°C
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta
= −40
to 65°C. From Ta
=
65 to 85°C a derating factor of
−10
mW/°C should be
applied up to 300 mW.
Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise and fall time
Symbol
V
CC
V
IN
V
OUT
T
opr
dt/dV
Rating
4.5 to 5.5
0 to V
CC
0 to V
CC
−40
to 85
0 to 10
Unit
V
V
V
°C
ns/V
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
3
2007-10-01
TC74ACT257P/F/FN
Electrical Characteristics
DC Characteristics
Test Condition
Characteristics
Symbol
V
CC
(V)
⎯
⎯
I
OH
= −50 μA
V
IN
=
V
IH
or I
OH
= −24
mA
V
IL
I
OH
= −75
mA
I
OL
=
50
μA
V
IN
=
V
IH
or I
OL
=
24 mA
V
IL
I
OL
=
75 mA
V
IN
=
V
IH
or V
IL
V
OUT
=
V
CC
or GND
V
IN
=
V
CC
or GND
V
IN
=
V
CC
or GND
Per input: V
IN
=
3.4 V
Other input: V
CC
or GND
4.5 to
5.5
4.5 to
5.5
4.5
4.5
(Note)
5.5
4.5
4.5
(Note)
5.5
5.5
5.5
5.5
5.5
Min
2.0
⎯
4.4
3.94
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Ta
=
25°C
Typ.
⎯
⎯
4.5
⎯
⎯
0.0
⎯
⎯
⎯
⎯
⎯
⎯
Max
⎯
0.8
⎯
⎯
⎯
0.1
0.36
⎯
±0.5
±0.1
8.0
1.35
Ta
= −40
to
85°C
Min
2.0
⎯
4.4
3.80
3.85
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Max
⎯
0.8
⎯
⎯
⎯
0.1
0.44
1.65
±5.0
±1.0
80.0
1.5
μA
μA
μA
mA
V
V
V
V
Unit
High-level input
voltage
Low-level input
voltage
High-level output
voltage
V
IH
V
IL
V
OH
Low-level output
voltage
V
OL
3-state output
off-state current
Input leakage
current
Quiescent supply
current
I
OZ
I
IN
I
CC
I
C
Note:
This spec indicates the capability of driving 50
Ω
transmission lines.
One output should be tested at a time for a 10 ms maximum duration.
AC Characteristics
(C
L
=
50 pF, R
L
=
500
Ω,
input: t
r
=
t
f
=
3 ns)
Characteristics
Propagation delay
time
(A, B-Y)
Propagation delay
time
(SELECT-Y)
Output enable time
Symbol
Test Condition
V
CC
(V)
t
pLH
t
pHL
t
pLH
t
pHL
t
pZL
t
pZH
t
pLZ
t
pHZ
C
IN
C
OUT
C
PD
(Note)
⎯
5.0
±
0.5
Min
⎯
Ta
=
25°C
Typ.
6.5
Max
9.6
Ta
= −40
to
85°C
Min
1.0
Max
11.0
ns
Unit
⎯
5.0
±
0.5
⎯
7.8
11.4
1.0
13.0
ns
⎯
5.0
±
0.5
⎯
6.3
9.6
1.0
11.0
ns
Output disable time
Input capacitance
Output capacitance
Power dissipation
capacitance
⎯
⎯
⎯
⎯
5.0
±
0.5
⎯
⎯
⎯
⎯
6.3
5
10
57
8.8
10
⎯
⎯
1.0
⎯
⎯
⎯
10.0
10
⎯
⎯
ns
pF
pF
pF
Note:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
I
CC
(opr)
=
C
PD
½V
CC
½f
IN
+
I
CC
/4 (per bit)
4
2007-10-01
FPGA/CPLD
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