End of Life. Last Available Purchase Date is 31-Dec-2014
Si9122E
Vishay Siliconix
500-kHz Half-Bridge DC/DC Controller
with Integrated Secondary Synchronous Rectification Drivers
DESCRIPTION
Si9122E is a half-bridge controller IC ideally suited to fixed
telecom applications where high efficiency is required at low
output voltages (e.g. < 3.3 V). Designed to operate within the
fixed telecom voltage range of 36 V to 75 V, the IC is capable
of controlling and driving both the low and high-side switching
devices of a half bridge circuit and also controlling the
switching devices on the secondary side of the bridge. Due
to the very low on-resistance of the secondary MOSFETs, a
significant increase in conversion efficiency can be achieved
as compared with conventional Schottky diodes. Control of
the secondary devices is by means of a pulse transformer
and a pair of inverters. Such a system has efficiencies well in
excess of 90 % even for low output voltages.
On-chip control of the dead time delays between the primary
and secondary synchronous signals keep efficiencies high
and prevent shorting of the power transformer. An external
resistor sets the oscillator frequency from 200 kHz to
500 kHz.
Si9122E has advanced current monitoring and control
circuitry which allow the user to set the maximum current in
the primary circuit. Such a feature acts as protection against
output shorting and also provides constant current into large
capacitive loads during start-up or when paralleling power
supplies. Current sensing is by means of a sense resistor on
the low-side primary device.
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
92 % primary/secondary duty cycle
135 °C over temperature protection
Compatible with ETSI 300 132-2
RoHS
COMPLIANT
28 V to 75 V input voltage range
Integrated ± 1 A half bridge primary drivers
Secondary synchronous rectifier control signals with
programmable deadtime delay
Voltage mode control
Voltage feedforward compensation
High voltage pre-regulator operates during start-up
Current sensing on low-side primary device
Frequency foldback eliminates constant current tail
Advanced maximum current control during start-up and
shorted load
Low input voltage detection
Programmable soft-start function
•
APPLICATIONS
•
•
•
•
Network cards
Power supply modules
Distributed power systems
Intermediate bus converter
•
Brick converter
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
36 V to 75 V
REG_COMP
V
CC
V
IN
BST
DH
LX
Synchronous
Rectifiers
1 V to 12 V Typ.
+
V
OUT
-
Si9122E
V
INDET
DL
CS2
CS1
C
L_CONT
SR
H
SR
L
PGND
R
OSC
V
REF
GND
BBM
V
CC
Error
Amplifier
+
-
V
REF
EP
Opto Isolator
SS
Figure 1.
Document Number: 73866
S-80112-Rev. D, 21-Jan-08
www.vishay.com
1
Si9122E
Vishay Siliconix
TECHNICAL DESCRIPTION
Si9122E is a voltage mode controller for the half-bridge
topology. With 100 V depletion mode MOSFET, the Si9122E
is capable of powering directly from the high voltage bus to
V
CC
through an external PNP pass transistor, or may be
powered through an external regulator directly through the
V
CC
pin. With PWM control, Si9122E provides peak
efficiency throughout the entire line and load range. In order
to simplify the design of efficient secondary synchronous
rectification circuitry, the Si9122E provides intelligent gate
drive signals to control the secondary MOSFETs. With
independent gate drive signals from the controller,
transformer design is no longer limited by the gate to source
rating of the secondary-side MOSFETs. Si9122E provides
constant V
GS
voltage, independent of the line voltage to
minimize the gate charge loss as well as conduction loss.
To prevent shoot-through current or transformer shorting,
adjustable Break-Before-Make (BBM) time is incorporated
into the IC and is programmed by an external precision
resistor.
Si9122E is assembled in lead (Pb)-free TSSOP-20 and
MLP65-20 packages. To satisfy stringent ambient
temperature requirements, Si9122E is rated to handle the
industrial temperature range of - 40 °C to 85 °C. When a
situation arises which results in a rapid increase in primary
(or secondary) current such as output shorted or start-up
with a large output capacitor, control of the PWM generator
is handed over to the current loop. Monitoring of the load
current is by means of an external current sense resistor in
the source of the primary low-side switch. With the lower
OTP set at 135 °C , the DNF20 package improves the
thermal headroom.
R
OSC
High-Side
Primary
Driver
V
IN
V
CC
REG_COMP
Pre-Regulator
V
REF
9.1
V
+
-
BST
Int
DH
LX
V
CC
DL
V
UVLO
8.8 V
Low-Side
Primary
Driver
OSC
Ramp
V
INDET
V
REF
132 k
60 k
EP
Error Amplifier
–
+
V
REF
+
-
+
-
V
UV
V
FF
V
SD
550 mV
+
–
Driver
Control
and
Timing
OTP
V
CC
PGND
SR
H
SYNC
Driver High
V
CC
20 µA
SS
2
PWM
Comparator
I
SS
8V
Over Current Protection
+
–
Peak DET
Duty Cycle
Control
CS2
CS1
SR
L
SYNC
Driver Low
Si9122E
GND
C
L_CONT
BBM
Figure 2.
ABSOLUTE MAXIMUM RATINGS
All voltages referenced to GND = 0 V
Parameter
V
IN
(Continuous)
V
IN
(100 ms)
V
CC
V
BST
V
LX
V
BST
- V
LX
V
REF
, R
OSC
Logic Inputs
Analog Inputs
HV Pre-Regulator Input Current
www.vishay.com
2
Continuous
Continuous
100 ms
Limit
80
100
14.5
95
113.2
100
15
- 0.3 to V
CC
+ 0.3
- 0.3 to V
CC
+ 0.3
- 0.3 to V
CC
+ 0.3
5
mA
V
Unit
Document Number: 73866
S-80112-Rev. D, 21-Jan-08
Si9122E
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
All voltages referenced to GND = 0 V
Parameter
Storage Temperature
Operating Junction Temperature
Power Dissipation
a
Limit
- 65 to 150
150
TSSOP-20
b
MLP65-20
c
TSSOP-20
MLP65-20
850
2500
75
38
Unit
°C
mW
°C/W
Thermal Impedance (θ
JA
)
Notes:
a. Device mounted on JEDEC compliant 1S2P test board.
b. Derate 14 mW/°C above 25 °C.
c. Derate 26 mW/°C above 25 °C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
All voltages referenced to GND = 0 V
Parameter
V
IN
V
CC
CV
CC
f
OSC
R
OSC
R
BBM
C
REF
C
BOOST
Analog Inputs
Digital Inputs
Reference Voltage Output Current
Limit
36 to 75
10.5 to 13.2
≥
4.7
200 to 500
30 to 72
22 to 50
0.1
0.1
0 to V
CC
- 2
0 to V
CC
0.1 to 2.5
Unit
V
µF
kHz
kΩ
µF
V
mA
SPECIFICATIONS
a
Test Conditions
Unless Otherwise Specified
f
NOM
= 500 kHz, V
IN
= 75 V
V
INDET
= 7.5 V; 10.5 V
≤
V
CC
≤
13.2 V
V
CC
= 12 V, 25 °C Load = 0 mA
V
REF
= 0 V
I
REF
= 0 to - 2.5 mA
at 100 Hz
R
OSC
= 30 kΩ, f
NOM
= 500 kHz
F
MAX
F
FOBK
I
BIAS
A
V
BW
PSRR
SR
at 110 Hz
R
OSC
= 22.6 kΩ
f
NOM
= 500 kHz, V
CS2
- V
CS1
> 150 mV
V
EP
= 0 V
- 40
- 2.2
5
60
0.5
- 20
400
500
100
- 15
- 30
60
20
600
Limits
- 40 to 85 °C
Min.
b
3.2
Typ.
c
3.3
Max.
b
3.4
- 50
- 75
Unit
V
mA
mV
dB
%
kHz
Parameter
Reference (3.3 V)
Output Voltage
Short Circuit Current
Load Regulation
Power Supply Rejection
Oscillator
Accuracy (1 % R
OSC
)
Max Frequency
g
Foldback Frequency
d
Error Amplifier
Input Bias Current
Gain
Bandwidth
Power Supply Rejection
Slew State
Symbol
V
REF
I
SREF
dVr/dir
PSRR
µA
V/V
MHz
dB
V/µs
Document Number: 73866
S-80112-Rev. D, 21-Jan-08
www.vishay.com
3
Si9122E
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions
Unless Otherwise Specified
f
NOM
= 500 kHz, V
IN
= 75 V
V
INDET
= 7.5 V; 10.5 V
≤
V
CC
≤
13.2 V
V
CS1
- GND, V
CS2
- GND
Limits
- 40 to 85 °C
Min.
b
Typ.
c
± 150
Max.
b
Unit
mV
Parameter
Current Sense Amplifier
Input Voltage CM Range
Current Sense Amplifier
Input Amplifier Gain
Input Amplifier Bandwidth
Input Amplifier Offset Voltage
C
L_CONT
Current
Symbol
V
CM
A
VOL
BW
V
OS
17.5
5
±5
dV
CS
= 0
120
0
>2
100
150
- 50
0.6
Primary
88
90
91
93
< 17
3
36
86
8
- 29
50
20
7.4
T
A
= 25 °C
8.5
7.15
T
A
= 25 °C
8.1
9.1
9.1
9.2
8.8
8.8
0.5
Start-Up Condition
Normal Operation
V
INDET
Rising
V
INDET
Falling
12
7.35
350
20
8.05
550
200
3.13
0.23
3.3
0.3
135
113
3.46
0.35
28
8.85
720
9.8
9.3
10.4
9.7
- 19
82
75
10
200
14
-9
110
1.5
94
95
dV
CS
= 100 mV
dV
CS
= 100 mV
I
PD
= I
PU
- I
CL_CONT
= 0
I
PD
> 2 mA
I
PU
< 500
µA
I
PU
= 500
µA
V
EP
= 0 V
dB
MHz
mV
µA
mA
I
CL_CONT
Lower Current Limit Threshold
Upper Current Limit Threshold
Hysteresis
C
L_CONT
Clamp Level
PWM Operation
V
TLCL
V
THCL
C
L_CONT
D
MAX
mV
V
%
%
Duty Cycle
D
MIN
Pre-Regulator
Input Voltage
Input Leakage Current
Regulator Bias Current
Regulator_Comp
Pre-Regulator drive Capability
V
CC
Pre-Regulator Turn Off
Threshold Voltage
Undervoltage Lockout
V
ULVO
Hysteresis
f
Soft-Start
Soft-Start Current Output
Soft-Start Completion Voltage
Shutdown
V
INDET
Shutdown
V
SD
Hysteresis
V
INDET
Input Threshold Protection
V
INDET
- V
IN
Under Voltage
V
UV
Hysteresis
Over Temperature Voltages
Activating Temperature
De-Activating Temperature
OTP_on
OTP_off
V
UV
I
SS
V
SS_COMP
V
SD
+ V
IN
I
LKG
I
REG1
I
REG2
I
SOURCE
I
SINK
I
START
V
REG1
V
REG2
V
UVLO
V
UVLOHYS
f
OSC
= 500 kHz, 25 °C
V
INDET
= 4.8 V, V
IN
= 48 V
Secondary
V
EP
= 1.75 V
V
CS2
- V
CS1
> 150 mV
I
IN
= 10
µA
V
IN
= 75 V, V
CC
> V
REG
V
IN
= 75 V, V
INDET
< V
SD
V
IN
= 75 V, V
INDET
> V
REF
V
CC
= 12 V
V
CC
< V
REG
V
INDET
> V
REF
V
INDET
= 0 V
V
CC
Rising
V
µA
mA
µA
mA
V
µA
V
mV
V
INDET
Rising
V
INDET
Falling
T
J
Increasing
T
J
Decreasing
V
°C
www.vishay.com
4
Document Number: 73866
S-80112-Rev. D, 21-Jan-08
Si9122E
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions
Unless Otherwise Specified
f
NOM
= 500 kHz, V
IN
= 75 V
V
INDET
= 7.5 V; 10.5 V
≤
V
CC
≤
13.2 V
Shutdown, V
INDET
= 0 V
V
INDET
< V
REF
V
INDET
> V
REF,
f
NOM
= 500 kHZ
V
CC
= 12 V, C
DH
= C
DL
= 3 nF
C
SR
H
= C
SR
L
= 0.3 nF
Sourcing 10 mA
Sinking 10 mA
V
LX
= 48 V, V
BST
= V
LX
+ V
CC
V
LX
= 48 V, V
BST
= V
LX
+ V
CC
V
CC
= 10.5 V
C
DH
= 3 nF
V
CC
- 0.3
0.3
- 1.0
0.75
1.0
35
35
V
CC
- 0.4
0.4
48
9
24
18
- 100
100
35
35
< 200
< 200
< 200
< 200
mA
ns
ns
- 0.75
V
BST
- 0.3
V
LX
+ 0.3
1.3
- 1.3
0.75
1.9
- 0.7
- 1.0
1.0
35
35
2.7
- 0.4
- 0.75
Limits
- 40 to 85 °C
Min.
b
50
4
5
8
10
21
Typ.
c
Max.
b
350
12
15
mA
Unit
µA
Parameter
Converter Supply Current (V
CC
)
Shutdown
Converter Supply Current (V
CC
)
Switching Disabled
Switching w/o Load
Switching with C
LOAD
Symbol
I
CC1
I
CC2
I
CC3
I
CC4
Output MOSFET DH Driver (High-Side)
V
OH
Output High Voltage
V
OL
Output Low Voltage
Boost Current
LX Current
Peak Output Source
Peak Output Sink
Rise Time
Fall Time
I
BST
I
LX
I
SOURCE
I
SINK
t
r
t
f
V
mA
A
ns
Output MOSFET DL Driver (Low-Side)
V
OH
Output High Voltage
V
OL
Output Low Voltage
Peak Output Source
Peak Output Sink
Rise Time
Fall Time
I
SOURCE
I
SINK
t
r
t
f
Sourcing 10 mA
Sinking 10 mA
V
CC
= 10.5 V
C
DH
= 3 nF
V
A
ns
Synchronous Rectifier (SR
H
, SR
L
) Drivers
V
OH
Output High Voltage
Output Low Voltage
V
OL
t
BBM1
Break-Before-Make Time
e
t
BBM2
t
BBM3
t
BBM4
Peak Output Source
Peak Output Sink
Rise Time
Fall Time
Voltage Mode
Error Amplifier
Current Mode
Current Amplifier
t
d3DH
t
d4DL
t
d1DH
t
d2DL
I
SOURCE
I
SINK
t
r
t
f
Sourcing 10 mA
Sinking 10 mA
T
A
= 25 °C, R
BBM
= 33 kΩ, V
INDET
= 4.8 V,
V
EP
= 0 V, V
IN
= 48 V
T
A
= 25 °C, R
BBM
= 33 kΩ, BST= 60 V,
V
INDET
= 4.8 V, V
EP
= 0 V, V
IN
= 48 V = LX
V
CC
= 10.5 V
C
DH
= 3 nF
V
Input to High-Side Switch Off
Input to Low-Side Switch Off
Input to High-Side Switch Off
Input to Low-Side Switch Off
ns
ns
Notes:
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum (- 40 °C to 85 °C).
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. F
MIN
when V
C
L_CONT
at clamp level. Typical foldback frequency change + 20 %, - 30 % over temperature.
e. See Figure 3 for Break-Before-Make time definition.
f. V
UVLO
tracks V
REG1
by a diode drop.
g. Guaranteed by design and characterization, not tested in production.
#include <stdio.h>
#define FRAME 180
short int h = {
399,-296,-945,-1555,
-1503,-285,2112,5061,
7503,8450,7503,5061,
2112,-285,-1503,-1555,
-945,-296,399
};
st ......
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