Datasheet No. PD60292
IRS2166D(S)PbF
PFC + BALLAST CONTROL IC
Features
PFC, ballast control and 600 V half-bridge driver in one IC
Critical-conduction mode boost-type PFC
Programmable half-bridge over-current protection
Programmable preheat frequency
Programmable deadtime
Programmable preheat time
Programmable run frequency
RoHS compliant
End-of-life window comparator pin
Internal up/down current-sense fault counter
DC bus undervoltage reset
Lamp removal/auto-restart shutdown pin
Internal bootstrap MOSFET
Internal 15.6 V zener clamp diode on V
CC
Micropower startup (250 µA)
Latch immunity and ESD protection
Description
The IRS2166D is a fully integrated, fully protected 600 V
ballast control IC designed to drive all types of fluorescent
lamps. The IRS2166D is based on the popular IR2166
control IC with additional improvements to increase ballast
performance. PFC circuitry operates in critical conduction
mode and provides high PF, low THD, and DC bus
regulation. The IRS2166D features include programmable
preheat and run frequencies, programmable preheat time,
and programmable end-of-life protection. Comprehensive
protection features such as protection from failure of a lamp
to strike, filament failures, end-of-life protection, DC bus
undervoltage reset as well as an automatic restart function,
have been included in the design.
System Features
Improved V
BUS
regulation voltage tolerance
Increased SD pin shutdown voltage threshold hysteresis
Changed EOL pin internal 2.0 V bias to a +/-10 µA OTA
Internal bootstrap MOSFET
Packages
16-Lead PDIP
IRS2166DPbF
16-Lead SOIC
IRS2166DSPbF
Application Diagram (Typical Only)
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Page 1
IRS2166D(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
V
B
V
S
V
HO
V
LO
V
PFC
I
O,MAX
V
BUS
V
CPH
V
RT
V
RPH
I
RT
I
RPH
V
CT
I
COMP
I
ZX
I
CC
V
SD/EOL
I
SD/EOL
V
CS
I
CS
dV/dt
P
D
R
ΘJA
T
J
T
S
Definition
High-side floating supply voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side output voltage
PFC gate driver output voltage
Maximum allowable output current (HO, LO, PFC) due to external
power transistor miller effect
VBUS pin voltage
CPH pin voltage
RT pin voltage
RPH pin voltage
RT pin current
RPH pin current
CT pin voltage
COMP pin current
ZX pin current
VCC pin current (see Note 1)
SD/EOL pin voltage
SD/EOL pin current
CS pin voltage
CS pin current
Allowable V
S
offset voltage slew rate
Package power dissipation @ T
A
≤
+25 ºC
PD = (T
JMAX
-T
A
)/R
θJA
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
(16-Pin DIP)
(16-Pin SOIC)
(16-Pin DIP)
(16-Pin SOIC)
Min.
-0.3
V
B
– 25
V
S
- 0.3
-0.3
-0.3
-500
-0.3
-0.3
-0.3
-0.3
-5
-5
-0.3
-5
-5
-25
-0.3
-5
-0.3
-5
-50
---
---
---
---
-55
-55
Max.
625
V
B
+ 0.3
V
B
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
500
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
5
5
V
CC
+ 0.3
5
5
25
V
CC
+ 0.3
5
V
CC
+ 0.3
5
50
1.8
1.4
70
82
150
150
Units
V
mA
V
mA
V
mA
V
mA
V
mA
V/ns
W
ºC/W
ºC
T
L
Lead temperature (soldering, 10 seconds)
---
300
Note 1: This IC contains a zener clamp structure between the chip V
CC
and COM which has a nominal breakdown
voltage of 15.6 V. This supply pin should not be driven by a DC, low impedance power source greater than the V
CLAMP
specified in the electrical characteristics section.
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Symbol
V
B
-V
S
V
S
V
CC
I
CC
C
T
I
SD/EOL
I
CS
I
ZX
Definition
High side floating supply voltage
Steady state high-side floating supply offset voltage
Supply voltage
V
CC
supply current (see Note 2)
CT pin capacitance
SD/EOL pin current
CS pin current
ZX pin current
Min.
V
BSUV+
-1
V
CCUV+
Note 2
220
-1
Max.
V
CLAMP
600
V
CLAMP
20
---
1
Units
V
mA
pF
mA
T
J
Junction temperature
-25
125
ºC
Note 2: Enough current should be supplied into the V
CC
pin to keep the internal 15.6 V zener clamp diode on this pin
regulating its voltage, V
CLAMP
.
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Page 2
IRS2166D(S)PbF
Electrical Characteristics
V
CC
= V
BS
= V
BIAS
=14 V +/- 0.25 V, V
CPH
=V
SD/EOL
=V
COMP
=V
CS
=V
BUS
=V
ZX
=0.0 V, R
T
= R
PH
= 39.2 kΩ, C
LO
= C
HO
= C
PFC
=
1000 pF, C
T
= 470 pF, T
A
=25 °C unless otherwise specified. See state diagram for MODE.
Symbol
Supply Characteristics
V
CCUV+
V
CCUV-
V
UVHYS
I
QCCUV
I
QCC
I
QCCFLT
I
CC,RUN
V
CLAMP
I
QBS0
I
QBS1
V
BSUV+
V
BSUV-
I
LKVS
Definition
V
CC
supply undervoltage positive going
threshold
V
CC
supply undervoltage negative going
threshold
V
CC
supply undervoltage lockout hysteresis
UVLO mode V
CC
quiescent current
Quiescent V
CC
supply current
Fault quiescent V
CC
supply current
V
CC
current at RUN frequency
V
CC
zener clamp voltage
Quiescent V
BS
supply current
Quiescent V
BS
supply current
V
BS
supply undervoltage positive going
threshold
V
BS
supply undervoltage negative going
threshold
V
S
offset supply leakage current
Min
11.5
9.5
1.5
---
---
---
---
14.6
---
---
8.0
7.0
---
Typ
12.5
10.5
2.0
250
4.3
600
5.0
15.6
30
50
9.0
8.0
---
Max
13.5
11.5
3.0
500
5.1
900
---
16.6
70
90
10.0
Units
Test Conditions
V
CC
rising from 0 V,
CT = COM
V
V
CC
falling from 14 V,
CT = COM
CT = COM
V
CC
= 8 V, CT = COM
CT = COM
MODE = FAULT
MODE=RUN
COMP=2 V,
t
off,PFC
=2
μs
I
CC
= 10 mA
V
HO
= V
S
V
HO
= V
B
V
BS
rising from 0 V
V
BS
falling from 14 V
µA
mA
µA
mA
V
Floating Supply Characteristics
µA
V
9.0
50
µA
V
B
= V
S
= HO = 600 V
MODE = RUN
V
VBUS
= 3.5 V
MODE = RUN
V
VBUS
= 4.5 V
PFC Error Amplifier Characteristics
I
COMP,SOURCE
OTA error amplifier output current sourcing
I
COMP,SINK
V
COMPOH
V
COMPOL
OTA error amplifier output current sinking
OTA error amplifier output voltage swing
(high state)
OTA error amplifier output voltage swing (low
state)
V
BUS
internal reference voltage
(guaranteed by design)
V
BUS
over-voltage comparator positive going
threshold
V
BUS
over-voltage comparator negative going
hysteresis
ZX pin positve edge triggered threshold
voltage
ZX pin comparator hysterisis
ZX pin clamp voltage (high state)
PFC watch-dog pulse interval
20
-45
12.0
200
30
-35
12.5
300
40
µA
-25
13.0
400
V
mV
PFC Control Characteristics
V
VBUSREG
V
VBUSOV+
V
VBUSOV-
V
ZX
V
ZXHYS
V
ZXclamp
t
WD
3.9
4.1
4.0
1.5
100
5.7
150
4.0
4.3
4.15
2.0
300
6.7
400
4.1
4.5
V
4.3
2.5
500
7.7
500
mV
V
µs
I
ZX
= 5 mA, CT=COM
V
ZX
= 0 V, V
COMP
= 2.0 V
CT=COM
CT=COM
V
COMP
=4.0 V
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Page 3
IRS2166D(S)PbF
Electrical Characteristics (cont’d)
V
CC
= V
BS
= V
BIAS
=14 V +/- 0.25 V, V
CPH
=V
SD/EOL
= V
COMP
= V
CS
= V
BUS
= V
ZX
=0.0 V, R
T
= R
PH
= 39.2 kΩ, C
LO
= C
HO
= C
PFC
=
1000 pF, C
T
= 470 pF, T
A
=25 °C unless otherwise specified. See state diagram for MODE.
Symbol
Definition
Min
2.7
---
---
---
---
---
---
13.2
40
9
73
40
---
0.7
0.7
7.8
4.1
---
---
---
2.6
---
1.075
70
4.5
2.7
---
1.8
---
---
2.7
0.9
---
---
---
Typ
3.0
COM
V
CC
120
50
180
260
13.7
55
12
76
43
50
1.0
1.0
8.4
4.6
10.8
12.0
0.1
3.6
0
1.20
100
5.0
3.0
450
2.0
10
10
3.0
1.0
1
0
0
Max
3.3
---
---
220
100
---
---
---
---
---
81
46
---
1.5
1.5
9.0
5.1
---
---
---
4.6
---
1.325
140
5.5
3.3
---
2.2
---
---
3.3
Units
V
Test Conditions
CT=COM
PFC Protection Circuitry Characteristics
V
VBUSUV-
V
BUS
pin undervoltage reset threshold
Gate Driver Output Characteristics (HO, LO and PFC pins)
V
OL
V
OH
t
r
t
f
I
0+
I
0-
V
B,ON
I
B,CAP
I
B,10V
f
PH
f
RUN
D
t
d,LO
t
d,HO
V
CT+
V
CT-
V
CPHEOP
V
CPHRUN
I
RPHLK
I
CPH
V
CPHFLT
V
CSTH+
n
EVENTS
V
SDTH+
V
SDTH-
V
SD,delay
V
EOLBIAS
I
EOL,SRC
I
EOL,SNK
V
EOLTH+
V
EOLTH-
V
EOL,delay
V
CTFLT
V
CPHFLT
Low-level output voltage, LO, HO, PFC
High-level output voltage, LO, HO, PFC
Turn-on rise time
Turn-off fall time
Source current
Sink current
V
B
when the bootstrap FET is on
V
B
source current when FET is on
V
B
source current when FET is on
Preheat half-bridge oscillator frequency
Run half-bridge oscillator frequency
Oscillator duty cycle
LO output deadtime
HO output deadtime
CT pin rising threshold voltage
CT pin falling threshold voltage
CPH pin end of preheat threshold voltage
CPH pin run mode threshold voltage
RPH pin leakage current
CPH pin charging current
CPH pin voltage in fault mode
CS pin over-current sense threshold
CS pin fault counter number of events
SD pin rising non-latched shutdown threshold
lt
SD pin falling reset threshold voltage
Delay from V
SDTH+
until LO goes low
EOL pin bias voltage
EOL pin internal OTA source current
EOL pin internal OTA sink current
EOL pin rising latched shutdown threshold
(active during RUN MODE)
EOL pin falling latched shutdown threshold
(active during RUN MODE)
Delay from V
EOLTH+
until LO goes low
CT pin fault mode voltage
CPH pin fault mode voltage
V
ns
mA
Bootstrap FET Characteristics
V
mA
C
BS
=0.1
μF
V
B
=10 V
MODE=PREHEAT
MODE=RUN,
CPH=13 V
Ballast Control Oscillator Characteristics
kHz
%
μs
V
Ballast Control Preheat Characteristics
V
CT=COM, I
RPH
<2 µA
V
BUS
=V
CC
, CT=COM,
V
SDEOL
=3.5 V,
MODE=RUN
CPH=5 V
MODE = FAULT
μA
V
V
Ballast Control Protection Circuitry Characteristics
MODE=PREHEAT,
V
BUS
=0 V
V
ns
V
μA
SD = V
EOLBIAS
+ 0.5 V
MODE=RUN, CT=COM
V
BUS
=4.0 V, CPH=13 V
MODE=RUN,
CT=COM, CPH=13 V
MODE=FAULT
CT=COM
V
1.1
---
---
---
µs
V
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Page 4
IRS2166D(S)PbF
Schematic Block Diagram
Please Note: All values shown in block diagram are typical values only
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