19-2390; Rev 0; 4/02
Lowest Jitter Quad PECL-to-ECL
Differential Translators
General Description
The MAX9424–MAX9427 high-speed, low-skew quad
PECL-to-ECL translators are designed for high-speed
data and clock driver applications. These devices feature
an ultra-low 0.24ps
(RMS)
random jitter and channel-to-
channel skew is less than 90ps in asynchronous mode.
The four channels can be operated synchronously with
an external clock, or in asynchronous mode determined
by the state of the SEL input. An enable input provides
the ability to force all the outputs to a differential low state.
The parts differ from one another by their input and out-
put termination options. The input options are an open
input or an internal differential 100Ω termination. The
output options are an open-emitter output or a series
50Ω termination. See
Ordering Information.
The MAX9424–MAX9427 operate from a positive voltage
supply of +2.375V to +5.5V, and a negative supply volt-
age of -2.375V to -5.5V and operate across the extended
temperature range of -40°C to +85°C. They are offered in
32-pin 5mm x 5mm TQFP and space-saving 5mm x 5mm
QFN packages.
o
0.24ps RMS Added Random Jitter
o
10ps Channel-to-Channel Skew in Synchronous
Mode
o
Guaranteed 500mV Differential Output at 3GHz
Clock Frequency
o
420ps Propagation Delay in Asynchronous Mode
o
Functionally Compatible with
SK4426 (MAX9424)
SK4430 (MAX9425)
SK4436 (MAX9426)
SK4440 (MAX9427)
o
Integrated 50Ω Outputs (MAX9425/MAX9427)
o
Integrated 100Ω Inputs (MAX9426/MAX9427)
o
Synchronous/Asynchronous Operation
Features
MAX9424–MAX9427
Ordering Information
INPUT OUTPUT
PART
(IN_, (OUT_,
OUT_)
IN_)
MAX9424EHJ
-40°C to +85°C 32 TQFP
Open
Open
MAX9424EGJ* -40°C to +85°C 32 QFN
Open
Open
MAX9425EHJ
-40°C to +85°C 32 TQFP
Open
50Ω
MAX9425EGJ* -40°C to +85°C 32 QFN
Open
50Ω
MAX9426EHJ
-40°C to +85°C 32 TQFP
100Ω
Open
MAX9426EGJ* -40°C to +85°C 32 QFN
100Ω
Open
MAX9427EHJ
-40°C to +85°C 32 TQFP
100Ω
50Ω
MAX9427EGJ* -40°C to +85°C 32 QFN
100Ω
50Ω
*Future
product—contact factory for availability.
TEMP
RANGE
PIN-
PACKAGE
Applications
Data and Clock Driver and Buffer
Central Office Backplane Clock Distribution
DSLAM Backplane
Base Station
ATE
Pin Configurations
OUT0
OUT0
V
GG
TOP VIEW
OUT0
OUT0
V
GG
V
EE
IN0
IN0
IN1
IN1
TOP VIEW
IN0
IN0
32
31
V
EE
IN1
30
29
28
27
32
V
CC
SEL
SEL
CLK
CLK
EN
EN
V
CC
1
2
3
4
5
6
7
8
9
IN3
31
30
29
28
27
26
25
24 V
GG
23 OUT1
22 OUT1
*
26
25
*
IN1
V
CC
SEL
SEL
CLK
CLK
EN
EN
V
CC
1
2
3
4
5
6
7
8
10
11
12
13
14
15
16
*
*
24
23
22
V
GG
OUT1
OUT1
V
EE
V
EE
OUT2
OUT2
V
GG
MAX9424
MAX9425
MAX9426
MAX9427
21 V
EE
20 V
EE
19 OUT2
18 OUT2
17 V
GG
MAX9424
MAX9425
MAX9426
MAX9427
21
20
19
18
17
10
IN3
11
V
GG
12
OUT3
13
OUT3
14
V
EE
15
IN2
16
9
OUT3
OUT3
V
EE
IN2
IN3
IN3
IN2
V
GG
TQFP (5mm x 5mm)
QFN
NOTE:
CORNER PINS ARE CONNECTED TO V
GG
.
________________________________________________________________
Maxim Integrated Products
IN2
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Lowest Jitter Quad PECL-to-ECL
Differential Translators
MAX9424–MAX9427
ABSOLUTE MAXIMUM RATINGS
V
CC
to V
GG
............................................................-0.3V to +6.0V
V
GG
to V
EE
.............................................................-0.3V to +6.0V
Input Pins to V
GG
........................................-0.3V to (V
CC
+ 0.3V)
Differential Input Voltage ..............................|V
CC
- V
GG
| or 3.0V,
whichever is less
Continuous Output Current .................................................50mA
Surge Output Current........................................................100mA
Continuous Power Dissipation (T
A
= +70°C)
32-Pin 5mm x 5mm TQFP
(derate 9.5mW/°C above +70°C) .................................761mW
32-Pin 5mm x 5mm QFN
(derate 21.3mW/°C above +70°C) ...................................1.7W
Junction-to-Ambient Thermal Resistance in Still Air
32-Pin 5mm x 5mm TQFP ........................................+105°C/W
32-Pin 5mm x 5mm QFN............................................+47°C/W
Junction-to-Ambient Thermal Resistance with
500LFPM Airflow
32-Pin 5mm x 5mm TQFP ..........................................+73°C/W
Junction-to-Case Thermal Resistance
32-Pin 5mm x 5mm TQFP ..........................................+25°C/W
32-Pin 5mm x 5mm QFN..............................................+2°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection
Human Body Model (all input pins) ...............................±500V
Human Body Model (all output pins) ...............................±2kV
Soldering Temperature (10s) ...........................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
- V
GG
= 2.375V to 5.5V, V
GG
- V
EE
= 2.375V to 5.5V, MAX9424/MAX9426 outputs terminated with 50Ω to V
GG
- 2.0V,
MAX9425/MAX9427 not externally terminated, T
A
= -40°C to +85°C. Typical values are at V
CC
- V
GG
= 3.3V, V
GG
- V
EE
= 3.3V, V
IHD
= V
CC
- 0.9V, V
ILD
= V
CC
- 1.7V, T
A
= +25°C, unless otherwise noted.) (Notes 1, 2, and 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
V
GG
+
1.4
V
GG
V
CC
- V
GG
< 3.0V
V
CC
- V
GG
≥
3.0V
Input Current
Differential Input Resistance
(IN_,
IN_)
OUTPUTS (OUT_,
OUT_)
Differential Output Voltage
Output Common-Mode Voltage
Output Impedance
Internal Current Source
POWER SUPPLY
Positive Supply Current
Negative Supply Current
I
CC
I
EE
(Note 4)
MAX9424/MAX9426 (Note 4)
MAX9425/MAX9427 (Note 4)
16
100
172
27
130
230
mA
mA
V
OH
- V
OL
V
OCM
R
OUT
I
SINK
Figure 1
Figure 1
MAX9425/MAX9427
MAX9425/MAX9427
600
V
GG
-
1.50
40
6
635
V
GG
-
1.25
50
8
V
GG
-
1.05
60
10
mV
V
Ω
mA
I
IH
, I
IL
MAX9424/
MAX9425
MAX9426/
MAX9427
EN,
EN,
SEL,
SEL,
IN_,
IN_,
CLK
or
CLK
= V
IHD
or V
ILD
EN,
EN,
SEL,
SEL,
CLK, or
CLK
= V
IHD
or V
ILD
0.2
0.2
-10
-10
86
100
TYP
MAX
UNITS
INPUTS (IN_,
IN_,
CLK,
CLK,
EN,
EN,
SEL,
SEL)
Differential Input High Voltage
Differential Input Low Voltage
V
IHD
V
ILD
V
ID
Figure 1
Figure 1
V
CC
V
CC
-
0.2
V
CC
-
V
GG
3.0
25
µA
25
114
Ω
V
V
Differential Input Voltage
Figure 1
V
R
IN
MAX9426/MAX9427
2
_______________________________________________________________________________________
Lowest Jitter Quad PECL-to-ECL
Differential Translators
AC ELECTRICAL CHARACTERISTICS
(V
CC
- V
GG
= 2.375V to 5.5V, V
GG
- V
EE
= 2.375V to 5.5V, outputs terminated with 50Ω to V
GG
- 2.0V, EN = V
IHD
,
EN
= V
ILD
, f
CLK
≤
3.0GHz, f
IN
≤
1.5GHz, input transition time = 125ps (20% to 80%), V
IHD
= V
GG
+ 1.4V to V
CC
, V
ILD
= V
GG
to V
CC
- 0.2V, V
IHD
- V
ILD
= 0.2V to smallest of |V
CC
- V
GG
| or 3.0V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC
- V
GG
= 3.3V, V
GG
- V
EE
= 3.3V, V
IHD
= V
CC
- 0.9V, V
ILD
= V
CC
- 1.7V, T
A
= +25°C, unless otherwise noted.) (Notes 1 and 5)
PARAMETER
IN_ to OUT_ Differential
Propagation Delay
CLK to OUT_ Differential
Propagation Delay
OUT_ to OUT_ Skew
OUT_ to OUT_ Skew
SYMBOL
t
PLH1
t
PHL1
t
PLH2
t
PHL2
t
SKD1
t
SKD2
f
CLK(MAX)
CONDITIONS
Figure 3, SEL = high, asynchronous
operation
Figure 4, SEL = low, synchronous operation
SEL = high, asynchronous operation
(Note 6)
SEL = low, synchronous operation (Note 6)
MAX9424/MAX9426, V
OH
- V
OL
≥
500mV,
SEL = low
MAX9425/MAX9427, V
OH
- V
OL
≥
300mV,
SEL = low
MAX9424/MAX9426, V
OH
- V
OL
≥
400mV,
SEL = high
MAX9425/MAX9427, V
OH
- V
OL
≥
250mV,
SEL = high
SEL = low, f
CLK
= 3.0GHz clock, f
IN
=
1.5GHz (Note 7)
SEL = high, f
IN
= 2.0GHz (Note 7)
Added Deterministic Jitter
t
DJ
t
S
t
H
t
R
t
F
∆t
PD
/∆T
SEL = low, f
CLK
= 3.0GHz, IN_ = 3.0Gbps
2
23
- 1 PRBS pattern (Note 7)
SEL = high, IN_ = 2.0Gbps 2
23
- 1 PRBS
pattern (Note 7)
Figure 4
Figure 4
Figure 3
Figure 3
80
80
89
87
0.2
120
120
1
MIN
300
460
TYP
420
580
38
10
MAX
570
730
90
70
UNITS
ps
ps
ps
ps
MAX9424–MAX9427
Maximum Clock Frequency
3.0
GHz
Maximum Data Frequency
f
IN(MAX)
2.0
GHz
Added Random Jitter
t
RJ
0.24
0.3
27
20
0.8
0.8
80
ps
(RMS)
ps
(P-P)
80
ps
ps
ps
ps
ps/°C
IN_ to CLK Setup Time
CLK to IN_ Hold Time
Output Rise Time
Output Fall Time
Propagation Delay Temperature
Coefficient
Note 1:
Measurements are made with the device in thermal equilibrium.
Note 2:
Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3:
DC parameters are production tested at +25°C. DC limits are guaranteed by design and characterization over the full
operating temperature range.
Note 4:
All outputs open, all inputs biased differential high or low except V
CC
, V
GG
, and V
EE
.
Note 5:
Guaranteed by design and characterization, and are not production tested. Limits are set to ±6 sigma.
Note 6:
Measured between outputs of the same part at the signal crossing points for a same-edge transition.
Note 7:
Device jitter added to the input signal.
_______________________________________________________________________________________
3
Lowest Jitter Quad PECL-to-ECL
Differential Translators
MAX9424–MAX9427
Typical Operating Characteristics
(MAX9424: V
CC
- V
GG
= 3.3V, V
GG
- V
EE
= 3.3V, outputs terminated with 50Ω to V
GG
- 2.0V, enabled, f
CLK
= 3.0GHz, f
IN
= 1.5GHz,
input transition time = 125ps (20% to 80%), V
IHD
= V
CC
- 0.9V, V
ILD
= V
CC
- 1.7V, T
A
= +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
MAX9424–MAX9427 toc01
OUTPUT AMPLITUDE (V
OH
- V
OL
)
vs. IN_ FREQUENCY
MAX9424–MAX9427 toc02
OUTPUT RISE/FALL TIME
vs. TEMPERATURE
MAX9424–MAX9427 toc03
650
600
OUTPUT AMPLITUDE (mV)
SEL = HIGH
550
500
450
400
350
94
100
SUPPLY CURRENT (mA)
I
EE
OUTPUT RISE/FALL TIME (ps)
92
FALL TIME
90
RISE TIME
88
75
INPUTS BIASED
DIFFERENTIALLY HIGH OR
LOW, OUTPUTS OPEN
50
25
I
CC
86
0
-40
-15
10
35
60
85
TEMPERATURE (°C)
84
0
0.5
1.0
1.5
2.0
2.5
3.0
-40
-15
10
35
60
85
IN_ FREQUENCY (GHz)
TEMPERATURE (°C)
IN-TO-OUT PROPAGATION DELAY
vs. TEMPERATURE
MAX9424–MAX9427 toc04
CLK-TO-OUT PROPAGATION DELAY
vs. TEMPERATURE
CLK-TO-OUT PROPAGATION DELAY (ps)
MAX9424–MAX9427 toc05
420
IN-TO-OUT PROPAGATION DELAY (ps)
t
PHL1
410
630
620
610
600
590
580
570
400
t
PLH1
390
t
PLH2
,
t
PHL2
380
-40
-15
10
35
60
85
TEMPERATURE (°C)
-40
-15
10
35
60
85
TEMPERATURE (°C)
4
_______________________________________________________________________________________
Lowest Jitter Quad PECL-to-ECL
Differential Translators
Pin Description
PIN
1, 8
2
3
4
5
6
7
9
10
11, 17, 24,
30
12
13
14, 20, 21,
27
15
16
18
19
22
23
25
26
28
29
31
32
NAME
V
CC
SEL
SEL
CLK
CLK
EN
EN
IN3
IN3
V
GG
OUT3
OUT3
V
EE
IN2
IN2
OUT2
OUT2
OUT1
OUT1
IN1
IN1
OUT0
OUT0
IN0
IN0
FUNCTION
Positive Supply Voltage. Bypass V
CC
to V
GG
with 0.1µF and 0.01µF ceramic capacitors. Place the
capacitors as close to the device as possible with the smaller value capacitor closest to the device.
Noninverting Differential Select Input. Setting SEL = 1 and
SEL
= 0 enables all four channels to
operate independently. Setting SEL = 0 and
SEL
= 1 enables all four channels to be synchronized to
CLK.
Inverting Differential Select Input
Noninverting Differential Clock Input
Inverting Differential Clock Input
Noninverting Differential Output Enable Input. Setting EN = 1 and
EN
= 0 enables all four outputs.
Setting EN = 0 and
EN
= 1 disables all four outputs.
Inverting Differential Output Enable Input
Noninverting Differential Input 3
Inverting Differential Input 3
Ground Reference
Inverting Differential Output 3
Noninverting Differential Output 3
Negative Supply Voltage. Bypass from V
EE
to V
GG
with 0.1µF and 0.01µF ceramic capacitors. Place
the capacitors as close to the device as possible with the smaller value capacitor closest to the
device.
Noninverting Differential Input 2
Inverting Differential Input 2
Inverting Differential Output 2
Noninverting Differential Output 2
Noninverting Differential Output 1
Inverting Differential Output 1
Inverting Differential Input 1
Noninverting Differential Input 1
Noninverting Differential Output 0
Inverting Differential Output 0
Inverting Differential Input 0
Noninverting Differential Input 0
MAX9424–MAX9427
_______________________________________________________________________________________
5
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