74LV4094D: 产品描述Counter Shift Registers 8-ST SHIFT/STORE BUS REGISTER; 产品类别逻辑逻辑; 文件大小207KB，共22页; 制造商NXP(恩智浦); 官网地址https://www.nxp.com; 标准

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74LV4094D概述

Counter Shift Registers 8-ST SHIFT/STORE BUS REGISTER

74LV4094D规格参数

参数名称	属性值
是否无铅	不含铅
是否Rohs认证	符合
厂商名称	NXP(恩智浦)
零件包装代码	SOIC
包装说明	3.90 MM, PLASTIC, MS-012, SOT-109-1, SOP-16
针数	16
Reach Compliance Code	unknown
其他特性	SISO OPERATION ALSO AVAILABLE
计数方向	RIGHT
系列	LV/LV-A/LVX/H
JESD-30 代码	R-PDSO-G16
JESD-609代码	e4
长度	9.9 mm
负载电容（CL）	50 pF
逻辑集成电路类型	SERIAL IN PARALLEL OUT
湿度敏感等级	1
位数	8
功能数量	1
端子数量	16
最高工作温度	125 °C
最低工作温度	-40 °C
输出特性	3-STATE
输出极性	TRUE
封装主体材料	PLASTIC/EPOXY
封装代码	SOP
封装等效代码	SOP16,.25
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE
峰值回流温度（摄氏度）	260
电源	3.3 V
传播延迟（tpd）	90 ns
认证状态	Not Qualified
座面最大高度	1.75 mm
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	1 V
标称供电电压 (Vsup)	3.3 V
表面贴装	YES
技术	CMOS
温度等级	AUTOMOTIVE
端子面层	NICKEL PALLADIUM GOLD
端子形式	GULL WING
端子节距	1.27 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	30
触发器类型	POSITIVE EDGE
宽度	3.9 mm
最小 fmax	20 MHz
Base Number Matches	1

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74LV4094

8-stage shift-and-store bus register

Rev. 4 — 19 December 2011

Product data sheet

1. General description

The 74LV4094 is a low voltage Si-gate CMOS device and is pin and functional compatible

with 74HC4094; 74HCT4094.

The 74LV4094 is an 8-stage serial shift register. It has a storage latch associated with

each stage for strobing data from the serial input to parallel buffered 3-state outputs

QP0 to QP7. The parallel outputs may be connected directly to common bus lines. Data is

shifted on positive-going clock transitions. The data in each shift register stage is

transferred to the storage register when the strobe (STR) input is HIGH. Data in the

storage register appears at the outputs whenever the output enable (OE) signal is HIGH.

Two serial outputs (QS1 and QS2) are available for cascading a number of 74LV4094

devices. Serial data is available at QS1 on positive-going clock edges to allow high-speed

operation in cascaded systems with a fast clock rise time. The same serial data is

available at QS2 on the next negative going clock edge. This is used for cascading

74LV4094 devices when the clock has a slow rise time.

2. Features and benefits



Optimized for low voltage applications: 1.0 V to 3.6 V

Accepts TTL input levels between V

= 2.7 V and V

= 3.6 V

Typical output ground bounce < 0.8 V at V

= 3.3 V and T

amb

= 25

C

Typical HIGH-level output voltage (V

) undershoot: > 2 V at V

= 3.3 V and

amb

= 25

C



ESD protection:



HBM JESD22-A114E exceeds 2000 V



MM JESD22-A115-A exceeds 200 V



Multiple package options



Specified from

40 C

to +85

C

and from

40 C

to +125

C

3. Applications



Serial-to-parallel data conversion



Remote control holding register

74LV4094D相似产品对比

	74LV4094D	74LV4094DB	74LV4094DB-T	74LV4094N	74LV4094PW
描述	Counter Shift Registers 8-ST SHIFT/STORE BUS REGISTER		Counter Shift Registers 8-STAGE SHIFT AND STORE BUS REG	Counter Shift Registers 8-STAGE SHIFT AND STORE BUS REG	Counter Shift Registers 8-ST SHIFT/STORE BUS REGISTER
是否Rohs认证	符合	符合	符合	符合	符合
厂商名称	NXP(恩智浦)	NXP(恩智浦)	NXP(恩智浦)	NXP(恩智浦)	NXP(恩智浦)
零件包装代码	SOIC	SSOP	SSOP	DIP	TSSOP
包装说明	3.90 MM, PLASTIC, MS-012, SOT-109-1, SOP-16	5.30 MM, PLASTIC, MO-150, SOT-338-1, SSOP-16	SSOP, SSOP16,.3	0.300 INCH, PLASTIC, SOT-38-4, DIP-16	4.40 MM, PLASTIC, MO-153, SOT-403-1, TSSOP-16
针数	16	16	16	16	16
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown
其他特性	SISO OPERATION ALSO AVAILABLE	SISO OPERATION ALSO AVAILABLE	SISO OPERATION ALSO AVAILABLE	SISO OPERATION ALSO AVAILABLE	SISO OPERATION ALSO AVAILABLE
计数方向	RIGHT	RIGHT	RIGHT	RIGHT	RIGHT
系列	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H	LV/LV-A/LVX/H
JESD-30 代码	R-PDSO-G16	R-PDSO-G16	R-PDSO-G16	R-PDIP-T16	R-PDSO-G16
JESD-609代码	e4	e4	e4	e4	e4
长度	9.9 mm	6.2 mm	6.2 mm	19.025 mm	5 mm
负载电容（CL）	50 pF	50 pF	50 pF	50 pF	50 pF
逻辑集成电路类型	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT	SERIAL IN PARALLEL OUT
位数	8	8	8	8	8
功能数量	1	1	1	1	1
端子数量	16	16	16	16	16
最高工作温度	125 °C	125 °C	125 °C	125 °C	125 °C
最低工作温度	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
输出特性	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
输出极性	TRUE	TRUE	TRUE	TRUE	TRUE
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	SOP	SSOP	SSOP	DIP	TSSOP
封装等效代码	SOP16,.25	SSOP16,.3	SSOP16,.3	DIP16,.3	TSSOP16,.25
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	IN-LINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）	260	260	260	NOT SPECIFIED	260
电源	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
传播延迟（tpd）	90 ns	90 ns	90 ns	90 ns	90 ns
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	1.75 mm	2 mm	2 mm	4.2 mm	1.1 mm
最大供电电压 (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
最小供电电压 (Vsup)	1 V	1 V	1 V	1 V	1 V
标称供电电压 (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
表面贴装	YES	YES	YES	NO	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
端子面层	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD	NICKEL PALLADIUM GOLD
端子形式	GULL WING	GULL WING	GULL WING	THROUGH-HOLE	GULL WING
端子节距	1.27 mm	0.65 mm	0.65 mm	2.54 mm	0.65 mm
端子位置	DUAL	DUAL	DUAL	DUAL	DUAL
处于峰值回流温度下的最长时间	30	30	30	NOT SPECIFIED	30
触发器类型	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
宽度	3.9 mm	5.3 mm	5.3 mm	7.62 mm	4.4 mm
最小 fmax	20 MHz	20 MHz	20 MHz	20 MHz	20 MHz
Base Number Matches	1	1	1	1	1
是否无铅	不含铅	不含铅	-	不含铅	不含铅
湿度敏感等级	1	1	1	-	1

74LV4094D

74LV4094D在线购买

74LV4094D概述

74LV4094D规格参数

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74LV4094D相似产品对比

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