EVALUATION KIT AVAILABLE
MAX2871
23.5MHz to 6000MHz Fractional/
Integer-N Synthesizer/VCO
General Description
The MAX2871 is an ultra-wideband phase-locked loop (PLL)
with integrated voltage control oscillators (VCOs) capable
of operating in both integer-N and fractional-N modes.
When combined with an external reference oscillator and
loop filter, the MAX2871 is a high-performance frequency
synthesizer capable of synthesizing frequencies from
23.5MHz to 6.0GHz while maintaining superior phase
noise and spurious performance.
The ultra-wide frequency range is achieved with the
help of multiple integrated VCOs covering 3000MHz to
6000MHz, and output dividers ranging from 1 to 128. The
device also provides dual differential output drivers, which
can be independently programmed to deliver -1dBm to
+8dBm differential output power. Both outputs can be
muted by either software or hardware control.
The MAX2871 is controlled by a 4-wire serial interface and
is compatible with 1.8V control logic. The device is available
in a lead-free, RoHS-compliant, 5mm x 5mm, 32-pin TQFN
package, and operates over an extended -40°C to +85°C
temperature range.
The MAX2871 has an improved feature set and better overall
phase noise and is fully pin and software-compatible with the
MAX2870.
Benefits and Features
●
Output Binary Buffers/Dividers Enable Extended
Frequency Range
• Divider Ratios of 1/2/4/8/16/32/64/128
• 23.5MHz to 6000MHz
●
High-Performance Phase Frequency Detector (PFD)
and Reference Frequency Reduces Spectral Noise
• PFD Up to 140MHz
• Reference Frequency Up to 210MHz
●
Low Normalized Inband Phase Noise of -230dBc/Hz
Reduces System Noise Floor Contribution
●
Manual/Automatic VCO Selection Permits Fast
Switching
●
Output Phase Reset and Adjustment Allow
Synchronization of Multiple Synthesizers
●
On-Chip Temperature Sensor with 7-Bit ADC Ensures
Optimum VCO Selection
●
Cycle Slip Reduction and Fast Lock Features
Improve Accuracy and Acquisition Time
●
VCO Lock Maintained Over Entire Temperature
Range Provides Glitch-Free Operation
●
Dual Differential Programmable Outputs Maximize
Flexibility of Use
Ordering Information
and
“Typical Application Circuit”
appears at end of data sheet.
Applications
●
Wireless Infrastructure
●
Test and Measurement
●
Clock Generation
●
Microwave Radios
Functional Diagram
MAX2871
REF_IN
CLK
DATA
LE
INTEGER
SPI AND
REGISTERS
VCO
FRAC
MODULUS
DIV-BY-
1/2/4/8/16
MUX
R COUNTER
DIVIDE-BY-2
MUX
MUX
LOCK DETECT
MUX
LD
CHARGE
PUMP
CP_OUT
GND_CP
TUNE
X2
DIV-BY-
1/2/4/8
RFOUTA_P
RFOUTA_N
RFOUT_EN
MAIN
MODULATOR
MUX
N COUNTER
MUX
RFOUTB_P
RFOUTB_N
19-7106; Rev 3; 4/17
MAX2871
23.5MHz to 6000MHz Fractional/
Integer-N Synthesizer /VCO
Absolute Maximum Ratings
V
CC_
to GND_ ......................................................-0.3V to +3.9V
All Other Pins to GND_ .............................-0.3V to V
CC_
+ 0.3V
Continuous Power Dissipation (T
A
= +70°C)
TQFN-EP Multilayer Board
(derate 34.5mW/°C above +70°C) .........................2758.6mW
Junction Temperature ......................................................+150°C
Operating Temperature Range ........................... -40°C to +85°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) ................................ +300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics
(Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (θ
JA
) ..........29°C/W
Junction-to-Case Thermal Resistance (θ
JC
) ..............1.7°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
DC Electrical Characteristics
(Measured using MAX2871 EV Kit. V
CC_
= 3V to 3.6V, V
GND_
= 0V, f
REF_IN
= 50MHz, f
PFD
= 50MHz, T
A
= -40°C to +85°C. Typical
values measured at V
CC_
= 3.3V; T
A
= +25°C; register settings (Reg 0:5) 00780000, 20000141, 01005E42, 00000013, 610F423C,
01400005;. unless otherwise noted.) (Note 2)
PARAMETER
Supply Voltage
RFOUT_ Current Consumption
I
RFOUT_
, minimum output power, single channel
I
RFOUT_
, maximum output power, single channel
Both channels
enabled,
maximum output
power
Total, including RFOUT, both
channel (Note 3)
Each output divide-by-2
I
CCVCO
+ I
CCRF
(Note 3)
Low-power sleep mode
CONDITIONS
MIN
3
TYP
3.3
9
25
165
8
122
1
200
mA
MAX
3.6
UNITS
V
mA
Supply Current
AC Electrical Characteristics
(Measured using MAX2871 EV Kit. V
CC_
= 3V to 3.6V, V
GND_
= 0V, f
REF_IN
= 50MHz, f
PFD
= 25MHz, f
RFOUT_
= 6000MHz,
T
A
= -40°C to +85°C. Typical values measured at V
CC_
= 3.3V, T
A
= +25°C, register settings (Reg 0:5) 00780000, 20000141,
01005E42, 00000013, 610F423C, 01400005; unless otherwise noted.) (Note 2)
PARAMETER
REFERENCE OSCILLATOR INPUT (REF_IN)
REF_IN Input Frequency Range
REF_IN Input Sensitivity
REF_IN Input Capacitance
REF_IN Input Current
PHASE DETECTOR
Phase Detector Frequency
Integer-N mode
Fractional-N mode
140
125
MHz
-60
10
0.7
2
+60
210
V
CC_
MHz
V
P-P
pF
µA
CONDITIONS
MIN
TYP
MAX
UNITS
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Maxim Integrated
│
2
MAX2871
23.5MHz to 6000MHz Fractional/
Integer-N Synthesizer /VCO
AC Electrical Characteristics (continued)
(Measured using MAX2871 EV Kit. V
CC_
= 3V to 3.6V, V
GND_
= 0V, f
REF_IN
= 50MHz, f
PFD
= 25MHz, f
RFOUT_
= 6000MHz,
T
A
= -40°C to +85°C. Typical values measured at V
CC_
= 3.3V, T
A
= +25°C, register settings (Reg 0:5) 00780000, 20000141,
01005E42, 00000013, 610F423C, 01400005; unless otherwise noted.) (Note 2)
PARAMETER
CHARGE PUMP
Sink/Source Current
R
SET
Range
RF OUTPUTS
Fundamental Frequency Range
Divided Frequency Range
VCO Sensitivity
Frequency Pushing
Frequency Pulling
2nd Harmonic
3rd Harmonic
2nd Harmonic
3rd Harmonic
Maximum Output Power
Minimum Output Power
Output Power Variation (Note 4)
Muted Output Power
Open loop
Open loop into 2:1 VSWR
Fundamental VCO output
Fundamental VCO output
VCO output divided-by-2
VCO output divided-by-2
f
RFOUT_
= 3000MHz (Note 4)
f
RFOUT_
= 3000MHz (Note 4)
-40°C ≤ T
A
≤ +85°C
3V ≤ V
CC_
≤ 3.6V
(Note 4)
10kHz offset
VCO at 3000MHz
100kHz offset
1MHz offset
5MHz offset
10kHz offset
VCO Phase Noise (Note 5)
VCO at 4500MHz
100kHz offset
1MHz offset
5MHz offset
10kHz offset
VCO at 6000MHz
100kHz offset
1MHz offset
5MHz offset
In-Band Noise Floor
1/f Noise
In-Band Phase Noise
Integrated RMS Jitter
Normalized (Note 6)
Normalized (Note 7)
(Note 8)
(Note 9)
With output dividers (1/2/4/8/16/32/64/128)
3000
23.4375
100
0.8
70
-40
-34
-25
-20
5
-4
1
0.2
-40
-83
-111
-136
-149
-77
-106
-132
-147
-71
-101
-128
-144
-230
-122
-102
0.2
dBc/Hz
dBc/Hz
dBc/Hz
ps
dBc/Hz
6000
6000
MHz
MHz
MHz/V
MHz/V
kHz
dBc
dBc
dBc
dBc
dBm
dBm
dB
dBm
CP[3:0] = 1111, R
SET
= 5.1kΩ
CP[3:0] = 0000, R
SET
= 5.1kΩ
2.7
5.12
0.32
10
mA
kΩ
CONDITIONS
MIN
TYP
MAX
UNITS
VCO AND FREQUENCY SYNTHESIZER NOISE
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Maxim Integrated
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3
MAX2871
23.5MHz to 6000MHz Fractional/
Integer-N Synthesizer /VCO
AC Electrical Characteristics (continued)
(Measured using MAX2871 EV Kit. V
CC_
= 3V to 3.6V, V
GND_
= 0V, f
REF_IN
= 50MHz, f
PFD
= 25MHz, f
RFOUT_
= 6000MHz,
T
A
= -40°C to +85°C. Typical values measured at V
CC_
= 3.3V, T
A
= +25°C, register settings (Reg 0:5) 00780000, 20000141,
01005E42, 00000013, 610F423C, 01400005; unless otherwise noted.) (Note 2)
PARAMETER
Spurious Signals Due to PFD Frequency
VCO Tune Voltage
TEMPERATURE SENSOR AND ADC
ADC Resolution
Temperature Sensor Accuracy
7
3
Bits
°C
CONDITIONS
50kHz loop bandwidth
0.5
MIN
TYP
-88
V
CC_
- 0.5
MAX
UNITS
dBc
V
DIGITAL I/O CHARACTERISTICS
(V
CC_
= +3V to +3.6V, V
GND_
= 0V, T
A
= -40°C to +85°C. Typical values at V
CC_
= 3.3V, T
A
= +25°C.) (Note 2)
PARAMETER
Input Logic-Level Low
Input Logic-Level High
Input Current
Input Capacitance
SERIAL INTERFACE OUTPUTS (MUX, LD)
Output Logic-Level Low
Output Logic-Level High
Output Current Level High
0.3mA sink current
0.3mA source current
V
CC
-
0.4
0.5
0.4
V
V
mA
V
IL
V
IH
I
IH
/I
IL
-1
1
CONDITIONS
MIN
TYP
0.4
1.5
+1
MAX
UNITS
V
V
µA
pF
SERIAL INTERFACE INPUTS (CLK, DATA, LE, CE, RFOUT_EN)
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MAX2871
23.5MHz to 6000MHz Fractional/
Integer-N Synthesizer /VCO
SPI TIMING CHARACTERISTICS
(V
CC_
= +3V to +3.6V, V
GND_
= 0V, T
A
= -40°C to +85°C. Typical values at V
CC_
= 3.3V, T
A
= +25°C.) (Note 2)
PARAMETER
CLK Clock Period
CLK Pulse-Width Low
CLK Pulse-Width High
LE Setup Time
LE Hold Time
LE Minimum Pulse-Width High
DATA Setup Time
DATA Hold Time
MUX Valid
SYMBOL
t
CP
t
CL
t
CH
t
LES
t
LEH
t
LEW
t
DS
t
DH
t
DOT
MUX transition valid after CLK rise
CONDITIONS
Guaranteed by CLK pulse-width
low and high
MIN
50
25
25
20
10
20
25
25
10
TYP
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 2:
Production tested at T
A
= +25°C. Cold and hot are guaranteed by design and characterization.
Note 3:
f
REF_IN
= 100MHz, phase detector frequency = 25MHz, RF output = 6000MHz.
Register setting: 00780000, 00400061, 34011242, F8010003, 638FF1FC, 80400005.
Note 4:
Measured single ended with 27nH to V
CC_RF
into 50Ω load. Power measured with single output enabled. Unused output
has 27nH to V
CC_RF
with 50Ω termination.
Note 5:
VCO phase noise is measured open loop.
Note 6:
Measured at 200kHz using a 50MHz Bliley NV108C19554 OCVCXO with 2MHz loop bandwidth. Register setting
801E0000, 8000FFF9, 80005FC2, 6C10000B, 638E80FC, 400005. EV kit loop filter: C2 = 1500pF, C1 = 33pF, R2A = 0Ω,
R2B = 1100Ω, R3 = 0Ω, C3 = open.
Note 7:
1/f noise contribution to the in-band phase noise is computed by using 1/f noise + 10log(10kHz/f
OFFSET
) +
20log(f
RF
/1GHz). Register setting: 803A0000, 8000FFF9, 81005F42, F4000013, 6384803C, 001500005.
Note 8:
f
REF_IN
= 50MHz; f
PFD
= 25MHz; offset frequency = 10kHz; VCO frequency = 4227MHz, output divide-by-2 enabled.
RFOUT = 2113.5MHz; N = 169; loop BW = 40kHz, CP[3:0] = 1111; integer mode.
Note 9:
f
REF_IN
= 50MHz; f
PFD
= 50MHz; VCO frequency = 4400MHz, f
RFOUT_
= 4400MHz; loop BW = 65kHz. Register setting:
002C0000, 200303E9, 80005642, 00000133, 638E82FC, 01400005. EV kit loop filter: C2 = 0.1µF, C1 = 0.012µF,
R2A = 0Ω, R2B = 120Ω, R3 = 250Ω, C3 = 820pF.
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