b. Based on maximum allowable Junction Temperature, package limitation current is 50 A.
* Pb containing terminations are not RoHS compliant, exemptions may apply.
Document Number: 71856
S-80793-Rev. G, 14-Apr-08
www.vishay.com
1
SUD50N03-09P
Vishay Siliconix
SPECIFICATIONS
T
J
= 25 °C, unless otherwise noted
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
b
Drain-Source On-State Resistance
b
Forward Transconductance
Dynamic
a
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
c
Gate-Source Charge
c
Gate-Drain Charge
c
Gate Resistance
Time
c
b
Symbol
V
(BR)DSS
V
GS(th)
I
GSS
I
DSS
I
D(on)
R
DS(on)
g
fs
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
R
g
t
d(on)
t
r
t
d(off)
t
f
Test Conditions
V
GS
= 0 V, I
D
= 250 µA
V
DS
= V
GS
, I
D
= 250 µA
V
DS
= 0 V, V
GS
= ± 20 V
V
DS
= 30 V, V
GS
= 0 V
V
DS
= 30 V, V
GS
= 0 V, T
J
= 125 °C
V
DS
= 5 V, V
GS
= 10 V
V
GS
= 10 V, I
D
= 20 A
V
GS
= 10 V, I
D
= 20 A, T
J
= 125 °C
V
GS
= 4.5 V, I
D
= 20 A
V
DS
= 15 V, I
D
= 20 A
Min.
30
1.0
Typ.
a
Max.
Unit
3.0
± 100
1
50
0.0076
0.0115
0.0095
0.015
0.014
V
nA
µA
A
Ω
S
50
20
2200
410
180
11
7.5
5.0
1.5
9
15
22
8
V
GS
= 0 V, V
DS
= 25 V, f = 1 MHz
pF
16
nC
2.1
15
25
35
12
100
1.5
70
Ω
V
DS
= 15 V, V
GS
= 4.5 V, I
D
= 50 A
0.5
Turn-On Delay
V
DD
= 15 V, R
L
= 0.3
Ω
Rise Time
c
c
I
D
≅
50 A, V
GEN
= 10 V, R
g
= 2.5
Ω
Turn-Off Delay Time
Fall Time
c
Source-Drain Diode Ratings and Characteristic
T
C
= 25 °C
I
SM
Pulsed Current
b
V
SD
I
F
= 50 A, V
GS
= 0 V
Diode Forward Voltage
t
rr
I
F
= 50 A, di/dt = 100 A/µs
Source-Drain Reverse Recovery Time
Notes:
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width
≤
300 µs, duty cycle
≤
2 %.
c. Independent of operating temperature.
ns
1.2
35
A
V
ns
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see
http://www.vishay.com/ppg?71856.
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4
Document Number: 71856
S-80793-Rev. G, 14-Apr-08
Package Information
www.vishay.com
Vishay Siliconix
TO-252AA Case Outline
E
b3
L3
A
C2
MILLIMETERS
DIM.
A
A1
b
b2
MIN.
2.18
-
0.64
0.76
4.95
0.46
0.46
5.97
4.10
6.35
4.32
9.40
2.28 BSC
4.56 BSC
1.40
0.89
-
1.01
1.78
1.27
1.02
1.52
MAX.
2.38
0.127
0.88
1.14
5.46
0.61
0.89
6.22
-
6.73
-
10.41
MIN.
0.086
-
0.025
0.030
0.195
0.018
0.018
0.235
0.161
0.250
0.170
0.370
INCHES
MAX.
0.094
0.005
0.035
0.045
0.215
0.024
0.035
0.245
-
0.265
-
0.410
D
H
b3
C
C2
L4
L5
gage plane height (0.5 mm)
L
D
D1
E
E1
H
e
e1
L
L3
L4
L5
b
e
e1
b2
C
A1
0.090 BSC
0.180 BSC
0.055
0.035
-
0.040
0.070
0.050
0.040
0.060
D1
E1
ECN: T16-0236-Rev. P, 16-May-16
DWG: 5347
Notes
• Dimension L3 is for reference only.
Revision: 16-May-16
Document Number: 71197
1
For technical questions, contact:
pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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