DATASHEET
Radiation Hardened, 5.0V/3.3V µ-Processor
Supervisory Circuits
ISL705ARH, ISL705BRH, ISL705CRH, ISL706ARH, ISL706BRH,
ISL706CRH
This family of devices are radiation hardened 5.0V/3.3V
Features
supervisory circuits that reduce the complexity required to
monitor supply voltages in microprocessor systems. These
devices significantly improve accuracy and reliability relative to
discrete solutions. Each IC provides four key functions.
1. A reset output during power-up, power-down and brownout
conditions.
2. An independent watchdog output that goes low if the
watchdog input has not been toggled within 1.6s.
3. A precision threshold detector for monitoring a power
supply other than V
DD
.
4. An active-low manual-reset input.
• Electrically screened to SMD
5962-11213
• QML qualified per MIL-PRF-38535 requirements
• Radiation hardness
- High dose rate . . . . . . . . . . . . . . . . . . . . . . . . . . 100krad(Si)
- SEL/SEB LET
TH
. . . . . . . . . . . . . . . . . . . . . . 86MeV/mg/cm
2
• Precision supply voltage monitor
- 4.65V threshold in the ISL705ARH/BRH/CRH
- 3.08V threshold in the ISL706ARH/BRH/CRH
• 200ms (typ) reset pulse width
- Active high, active low and open drain options
• Independent watchdog timer with 1.6s (typ) timeout
• Precision threshold detector
- 1.25V threshold in the ISL705ARH/BRH/CRH
- 0.6V threshold in the ISL706ARH/BRH/CRH
• Debounced TTL/CMOS compatible manual-reset input
• Reset output valid at V
DD
= 1.2V
Applications
• Supervisor for µ-processors, µ-controllers, FPGAs and DSPs
• Critical power supply monitoring
• Reliable replacement of discrete solutions
Related Literature
•
AN1650
“ISL705XRH Evaluation Board User’s Guide”
•
AN1671
“ISL706xRH Evaluation Board User Guide”
•
AN1651
“Single Event Effects (SEE) Testing of the
ISL705xRH/EH and ISL706xRH/EH Rad Hard Supervisory
Circuits”
• “Total
Dose Testing of the ISL706ARH Radiation Hardened
Microprocessor Supervisory Circuit”
•
AN1710
“ISL705xRH and IS706xRH SPICE Model”
5V POWER SUPPLY
1.4
V
CC
1.2
1.0
V
PFI
(V)
0.8
0.6
0.4
0.2
ISL706xRH
ISL705xRH
1 MR
2 V
DD
165k
3 GND
4 PFI
49.9k
WDO 8
RST 7
WDI 6
PFO
5
NMI
RST
I/O
µP
ISL705ARH
5V SUPERVISOR APPLICATION WITH OVERVOLTAGE PROTECTION
0
-80
-60
-40
-20
0
20
40
60
80
100 120 140
TEMPERATURE (°C)
FIGURE 1. TYPICAL APPLICATION
FIGURE 2. PRECISION THRESHOLD DETECTOR TEMPERATURE
CHARACTERISTICS CURVE
February 10, 2015
FN7662.3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Copyright Intersil Americas LLC 2011, 2014, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL705ARH, ISL705BRH, ISL705CRH, ISL706ARH, ISL706BRH, ISL706CRH
Ordering Information
ORDERING NUMBER
5962R1121301QXC
5962R1121301VXC
5962R1121301V9A
ISL705ARHF/PROTO
ISL705ARHX/SAMPLE
5962R1121302QXC
5962R1121302VXC
5962R1121302V9A
ISL705BRHF/PROTO
ISL705BRHX/SAMPLE
5962R1121303QXC
5962R1121303VXC
5962R1121303V9A
ISL705CRHF/PROTO
ISL705CRHX/SAMPLE
5962R1121304QXC
5962R1121304VXC
5962R1121304V9A
ISL706ARHF/PROTO
ISL706ARHX/SAMPLE
5962R1121305QXC
5962R1121305VXC
5962R1121305V9A
ISL706BRHF/PROTO
ISL706BRHX/SAMPLE
5962R1121306QXC
5962R1121306VXC
5962R1121306V9A
ISL706CRHF/PROTO
ISL706CRHX/SAMPLE
ISL705XRHEVAL1Z
ISL706XRHEVAL1Z
NOTES:
1. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed in the
“Ordering Information” table must be used when ordering.
2. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations.
PART NUMBER
(Note
1)
ISL705ARHQF (Note
2)
ISL705ARHVF (Note
2)
ISL705ARHVX
ISL705ARHF/PROTO (Note
2)
ISL705ARHX/SAMPLE
ISL705BRHQF (Note
2)
ISL705BRHVF (Note
2)
ISL705BRHVX
ISL705BRHF/PROTO (Note
2)
ISL705BRHX/SAMPLE
ISL705CRHQF (Note
2)
ISL705CRHVF (Note
2)
ISL705CRHVX
ISL705CRHF/PROTO (Note
2)
ISL705CRHX/SAMPLE
ISL706ARHQF (Note
2)
ISL706ARHVF (Note
2)
ISL706ARHVX
ISL706ARHF/PROTO (Note
2)
ISL706ARHX/SAMPLE
ISL706BRHQF (Note
2)
ISL706BRHVF (Note
2)
ISL706BRHVX
ISL706BRHF/PROTO (Note
2)
ISL706BRHX/SAMPLE
ISL706CRHQF (Note
2)
ISL706CRHVF (Note
2)
ISL706CRHVX
ISL706CRHF/PROTO (Note
2)
ISL706CRHX/SAMPLE
ISL705XRH Evaluation Board
ISL706XRH Evaluation Board
TEMP RANGE
(°C)
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
PACKAGE
(RoHs Compliant)
8 Ld Flatpack
8 Ld Flatpack
Die
8 Ld Flatpack
Die
8 Ld Flatpack
8 Ld Flatpack
Die
8 Ld Flatpack
Die
8 Ld Flapack
8 Ld Flatpack
Die
8 Ld Flatpack
Die
8 Ld Flapack
8 Ld Flatpack
Die
8 Ld Flatpack
Die
8 Ld Flatpack
8 Ld Flatpack
Die
8 Ld Flatpack
Die
8 Ld Flatpack
8 Ld Flatpack
Die
8 Ld Flatpack
Die
K8.A
K8.A
K8.A
K8.A
K8.A
K8.A
K8.A
K8.A
K8.A
K8.A
K8.A
K8.A
K8.A
K8.A
K8.A
K8.A
K8.A
K8.A
PKG.
DWG. #
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ISL705ARH, ISL705BRH, ISL705CRH, ISL706ARH, ISL706BRH, ISL706CRH
Pin Configurations
ISL705ARH, ISL706ARH
(8 LD FLATPACK)
TOP VIEW
MR
V
DD
GND
PFI
1
2
3
4
8
7
6
5
WDO
RST
WDI
PFO
ISL705BRH, ISL706BRH
(8 LD FLATPACK)
TOP VIEW
MR
V
DD
GND
PFI
1
2
3
4
8
7
6
5
WDO
RST
WDI
PFO
ISL705CRH, ISL706CRH
(8 LD FLATPACK)
TOP VIEW
MR
V
DD
GND
PFI
1
2
3
4
8
7
6
5
WDO
RST_OD
WDI
PFO
Pin Descriptions
ISL705ARH
ISL706ARH
1
2
ISL705BRH
ISL706BRH
1
2
ISL705CRH
ISL706CRH
1
2
PIN
NAME
MR
VDD
DESCRIPTION
Manual Reset. MR is an active-low, debounced, TTL/CMOS compatible input that may
be used to trigger a reset pulse.
Power Supply. V
DD
is a supply voltage input that provides power to all internal circuitry.
This input is also monitored and used to trigger a reset pulse. Reset is guaranteed
operable after V
DD
rises above 1.2V.
Ground. GND is a supply voltage return for all internal circuitry. This return establishes
the reference level for voltage detection and should be connected to signal ground.
Power Fail Input. PFI is an input to a threshold detector, which may be used to monitor
another supply voltage level. The threshold of the detector (V
PFI
) is 1.25V in the
ISL705ARH/BRH/CRH and 0.6V in the ISL706ARH/BRH/CRH.
Power Fail Output. PFO is an active-low, push-pull output of a threshold detector that
indicates the voltage at the PFI pin is less than V
PFI
.
Watchdog Input. WDI is a tri-state input that monitors microprocessor activity. If the
microprocessor does not toggle WDI within 1.6s and WDI is not tri-stated, WDO goes
low. As long as reset is asserted or WDI is tri-stated, the watchdog timer will stay cleared
and will not count. As soon as reset is released and WDI is driven high or low, the timer
will start counting. Floating WDI or connecting WDI to a high impedance tri-state buffer
disables the watchdog feature.
Reset. RST is an active-low, push-pull output that is guaranteed to be low once V
DD
reaches 1.2V. As V
DD
rises, RST stays low. When V
DD
rises above a 4.65V
(ISL705ARH/BRH/CRH) or 3.08V (ISL706ARH/BRH/CRH) reset threshold, an internal
timer releases RST after about 200ms. RST pulses low whenever V
DD
goes below the
reset threshold. If a brownout condition occurs in the middle of a previously initiated
reset pulse, the pulse will continue for at least 140ms. On power-down, once V
DD
falls
below the reset threshold, RST goes low and is guaranteed low until V
DD
drops below
1.2V.
Reset. RST is an active-high, push-pull output. RST is the inverse of RST.
Reset. RST_OD is an active-low, open-drain output that goes low when reset is asserted.
This pin may be pulled up to V
DD
with a resistor consistent with the sink and leakage
current specifications of the output. Behavior is otherwise identical to the RST pin.
Watchdog Output. WDO is an active-low, push-pull output that goes low if the
microprocessor does not toggle WDI within 1.6s and WDI is not tri-stated. WDO is
usually connected to the non-maskable interrupt input of a microprocessor. When V
DD
drops below the reset threshold, WDO will go low whether or not the watchdog timer
has timed out. Reset is simultaneously asserted, thus preventing an interrupt. Since
floating WDI disables the internal timer, WDO goes low only when V
DD
drops below the
reset threshold, thus functioning as a low line output.
3
4
3
4
3
4
GND
PFI
5
6
5
6
5
6
PFO
WDI
7
-
-
RST
-
-
7
-
-
7
RST
RST_OD
8
8
8
WDO
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ISL705ARH, ISL705BRH, ISL705CRH, ISL706ARH, ISL706BRH, ISL706CRH
Functional Block Diagrams
V
DD
RST
+ V
REF
-
MR
PB
WDO
WDI
WDT
WDI
WDT
POR
+ V
REF
-
MR
PB
WDO
WDI
WDT
POR
RST
+ V
REF
-
MR
PB
WDO
POR
V
DD
V
DD
RST_OD
PFI
+ V
REF
-
PF
GND
PFO
PFI
+ V
REF
-
PF
GND
PFO
PFI
+ V
REF
-
PF
GND
PFO
ISL705ARH, ISL706ARH
ISL705BRH, ISL706BRH
ISL705CRH, ISL706CRH
Timing Diagrams
V
RST
V
DD
1.2V
>t
MR
MR
t
RST
t
RST
t
RST
RST
<t
MD
RST
FIGURE 3. RST, RST, MR AND WDO TIMING DIAGRAM
V
RST
V
DD
1.2V
< t
WD
< t
WD
< t
WD
WDI
t
WD
>t
WP
WDO
t
RST
t
WD
RST
t
RST
FIGURE 4. WATCHDOG TIMING DIAGRAM
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ISL705ARH, ISL705BRH, ISL705CRH, ISL706ARH, ISL706BRH, ISL706CRH
Absolute Maximum Ratings
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
Voltage on All Other Inputs . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V
DD
+ 0.3V
ESD Rating
Human Body Model (Tested per MIL-PRF-883 3015.7). . . . . . . . . .3.0kV
Machine Model (Tested per JESD22-A115C) . . . . . . . . . . . . . . . . . . 300V
Charged Device Model (Tested per JESD22-C110D) . . . . . . . . . . . .1.0kV
Latch Up (Tested per JESD-78C) . . . . . . . . . . . . . . . . . . . . . . Class 2, Level A
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
8 Ld Flatpack Package (Notes
3, 4).
. . . . .
140
15
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+175°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Recommended Operating Conditions
Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-55°C to +125°C
Supply Voltage
ISL705ARH/BRH/CRH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75V to 5.5V
ISL706ARH/BRH/CRH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.15V to 3.6V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
3.
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief
TB379
for details.
4. For
JC
, the “case temp” location is the center of the package underside.
Electrical Specifications
SYMBOL
POWER SUPPLY SECTION
V
DD
Unless otherwise specified V
DD
= 4.75V to 5.5V for the ISL705ARH/BRH/CRH, V
DD
= 3.15V to 3.6V for the
ISL706ARH/BRH/CRH T
A
= -55°C to +125°C. Boldface limits apply across the ambient operating temperature range, -55°C to +125°C.
PARAMETER
TEST CONDITIONS
MIN
(Note
5)
TYP
MAX
(Note
6)
(Note
5)
UNITS
Operating Supply Voltage (Note
7)
ISL705ARH/BRH/CRH
ISL706ARH/BRH/CRH
1.2
1.2
5
3.3
5.5
3.6
530
400
V
V
µA
µA
I
DD
Operating Supply Current
ISL705ARH/BRH/CRH
ISL706ARH/BRH/CRH
RESET SECTION
V
RST
Reset Threshold Voltage
ISL705ARH/BRH/CRH
ISL706ARH/BRH/CRH
V
HYS
Reset Threshold Voltage Hysteresis
ISL705ARH/BRH/CRH
ISL706ARH/BRH/CRH
t
RST
V
OUT
Reset Pulse Width
Reset Output Voltage
ISL705ARH/BRH, I
SOURCE
= 800µA
ISL705ARH/BRH/CRH, I
SINK
= 3.2mA
ISL706ARH/BRH, I
SOURCE
= 500µA
ISL706ARH/BRH/CRH, I
SINK
= 1.2mA
ISL70XARH/CRH, V
DD
= 1.2V, I
SINK
= 100µA
ISL70XBRH, V
DD
= 1.2V, I
SOURCE
= 4µA
I
LEAK
Reset Output Leakage Current
ISL705CRH, V
OUT
= V
DD
ISL706CRH, V
OUT
= V
DD
WATCHDOG SECTION
t
WD
t
WP
Watchdog Time-out Period
Watchdog Input (WDI) Pulse Width
ISL705ARH/BRH/CRH, V
IL
= 0.4V, V
IH
= 0.8 x V
DD
ISL706ARH/BRH/CRH, V
IL
= 0.4V, V
IH
= 0.8 x V
DD
1.00
50
100
1.60
2.25
s
ns
ns
0.9
1
1
0.8 x V
DD
0.3
0.3
4.50
3.00
20
20
140
V
DD
- 1.5
0.4
4.65
3.08
40
30
200
280
4.75
3.15
V
V
mV
mV
ms
V
V
V
V
V
V
µA
µA
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February 10, 2015
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