• A/V, high density cards, storage, DSL, STB, DVR, DTV,
Industrial PC
TYPICAL APPLICATION CIRCUIT
ENABLE
POWER GOOD
INPUT = 4.5 V to 15 V
PGOOD
V
I N
EN
BOOT
VOUT
LX
SS
V
FB
V
CC
COMP
P
G N D
A
G N D
R
O N
Fig. 1 - Typical Application Circuit for SiP12109
S13-2479-Rev. A, 16-Dec-13
Document Number: 62694
1
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiP12109
www.vishay.com
Vishay Siliconix
ORDERING INFORMATION
PART NUMBER
SiP12109DMP-T1-GE4
SiP12109DB
Note
• “DB” means demo board
PACKAGE
QFN16 3x3
N/A
MARKING
(LINE 2: P/N)
2109
-
M
ARKING
P/N
FYWLL
Format:
Line 1: Dot
Line 2: P/N
Line 3:
Siliconix
Logo + ESD
Symbol
Line 4: Factory Code + Year Code + Work Week Code + LOT Code
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL PARAMETER
V
IN
V
CC
LX
LX (AC)
Boot
A
GND
to P
GND
All Logic Inputs
TEMPERATURE
Max. Operating Junction Temperature
Storage Temperature
POWER DISSIPATION
Junction to Ambient Thermal Impedance
(R
thJA
)
Maximum Power Dissipation
ESD PROTECTION
HBM
2
kV
Ambient Temperature = 25 °C
Ambient Temperature = 100 °C
36.3
3.4
1.3
°C/W
W
-40 to 150
-65 to 150
°C
Reference to A
GND
CONDITIONS
Reference to P
GND
Reference to A
GND
Reference to P
GND
100 ns
LIMIT
-0.3 to 16
-0.3 to 6
-0.3 to 16
17
-0.3 to V
IN
+ V
CC
-0.3 to +0.3
-0.3 to V
CC
+ 0.3
V
UNIT
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S13-2479-Rev. A, 16-Dec-13
Document Number: 62694
2
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiP12109
www.vishay.com
Vishay Siliconix
MINIMUM
4.5
4.5
-1
0.6
TYPICAL
-
-
-
-
-40 to 85
-40 to 125
MAXIMUM
15
5.5
15
5.5
V
UNIT
RECOMMENDED OPERATING RANGE
(all voltages referenced to GND = 0 V)
ELECTRICAL PARAMETER
V
IN
V
CC
LX
V
OUT
TEMPERATURE
Recommended Ambient Temperature
Operating Junction Temperature
°C
ELECTRICAL SPECIFICATIONS
(test condition unless otherwise specified)
PARAMETER
POWER SUPPLY
Power Input Voltage Range
V
CC
Regulator Voltage
Input Current
Shutdown Current
V
CC
UVLO Threshold
V
CC
UVLO Hysteresis
CONTROLLER AND TIMING
Feedback Reference
V
FB
Input Bias Current
Transconductance
COMP Source Current
COMP Sink Current
On-Time
Minimum Off-Time
Soft Start Current
POWER MOSFETS
High-Side On Resistance
Low-Side On Resistance
FAULT PROTECTIONS
Over Current Limit
Output OVP Threshold
Output UVP Threshold
Over Temperature Protection
POWER GOOD
Power Good Output Threshold
Power Good On Resistance
Power Good Delay Time
ENABLE THRESHOLD
Logic High Level
Logic Low Level
Note
(1)
Tie V
CC
to V
IN
when V
IN
is < 5.5 V.
S13-2479-Rev. A, 16-Dec-13
Document Number: 62694
3
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
V
EN_H
V
EN_L
1.5
-
-
-
-
0.4
V
V
FB_RISING_VTH_OV
V
FB_FALLING_VTH_UV
R
ON_PGOOD
t
DLY_PGOOD
V
FB
rising above 0.6 V reference
V
FB
falling below 0.6 V reference
-
-
-
-
21
-12.5
30
5
-
-
60
-
%
μs
I
OCP
V
FB_OVP
V
FB_UVP
Inductor valley current
V
FB
with respect to 0.6 V reference
Rising temperature
Hysteresis
4
-
-
-
-
5
21
-65
160
35
6
-
-
-
-
A
%
°C
R
ON_HS
R
ON_LS
V
GS
= 5 V
-
-
45
27
67
41
m
V
FB
I
FB
g
m
I
COMP_SOURCE
I
COMP_SINK
t
ON
t
OFF_MIN.
I
SS
R
on
= 75 k
T
A
= 25 °C
T
A
= -40 °C to +85 °C
0.596
0.594
-
-
-
-
100
145
3
0.600
0.600
2
1
50
50
135
200
5
0.604
0.606
200
-
-
-
170
255
7
V
nA
mS
μA
ns
μA
V
IN
V
CC
IV
IN_NOLOAD
IV
IN_SHDN
V
CC_UVLO
V
CC_UVLO_HYS
T
A
= 25 °C, R
on
= 75 k,
Non-switching, I
O
= 0 A
EN = 0 V
V
CC
rising
Note 1
4.5
4.5
-
-
2.3
-
-
5
1.2
5
2.55
300
15
5.5
-
8
2.8
-
V
mA
μA
V
mV
SYMBOL
TEST CONDITION
V
IN
= 12 V, T
A
= -40 °C to 85 °C
LIMITS
MIN.
TYP.
MAX.
UNIT
SiP12109
www.vishay.com
FUNCTIONAL BLOCK DIAGRAM
COMP
VCC
PGOOD
EN
VIN
BOOT
AGND
OTP
VCC
0.6V
REFERENCE
5uA
SOFT
START
Vishay Siliconix
VCC
5V
Regulator
UVLO
SS
+
+ OTA
VFB
-
VIN
+
-
PWM
COMPARATOR
CONTROL
LOGIC
SECTION
ANTI-
XCOND
CONTROL
LX
LX
VCC
LX
ON-TIME
GENERATOR
I
sense
I-V
Converter
ZCD
RON
-
+
0.45V
VFB
PAD
0.72V
+
-
OV Comparator
UV Comparator
Current
Mirror
OCP
PGND
PGND
I
sense
Fig. 2 - SiP12109 Functional Block Diagram
S13-2479-Rev. A, 16-Dec-13
Document Number: 62694
4
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
SiP12109
www.vishay.com
PIN CONFIGURATION
Vishay Siliconix
16
15
14
V
IN
V
CC
A
GND
R
ON
Boot
13
12
P
GND
P
GND
V
IN
1
2
3
4
5
6
7
8
LX
LX
LX
PGOOD
P
GND
11
10
9
V
FB
SS
Fig. 3 -
SiP12109 Pin Configuration (Top View)
PIN CONFIGURATION
PIN NUMBER
1, 16
2
3
4
5
6
7
8
9
10, 11, 12
13
14, 15, PAD
NAME
V
IN
V
CC
A
GND
R
ON
COMP
V
FB
SS
EN
P
GOOD
LX
BOOT
P
GND
FUNCTION
Input supply voltage for power MOS. V
IN
= 4.5 V to 15 V
Internal regulator output, tie V
CC
to V
IN
when V
IN
is < 5.5 V
Analog ground
An external resistor between R
ON
and A
GND
sets the switching on time.
Connect to an external RC network for loop compensation and droop function.
Feedback voltage. 0.6 V (typ.). Use a resistor divider between V
OUT
and A
GND
to set the output voltage.
An external capacitor between SS and A
GND
sets the soft start time.
Enable pin. Pull enable above 1.5 V to enable and below 0.4 V to disable the part. Do not float this pin.
Power good output. Open drain.
Switching node, inductor connection point
Bootstrap pin - connect a capacitor of at least 100 nF from BOOT to LX to develop the floating supply
for the high-side gate drive.
Power ground
S13-2479-Rev. A, 16-Dec-13
Document Number: 62694
5
For technical questions, contact:
powerictechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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