A/D, D/C Converters for Image Signal Processing
MN65752H
Low Power 8-Bit, 2-Channel CMOS A/D Converter for Image Processing
Overview
The MN65752H is an 8-bit, 2-channel CMOS analog-
to-digital converter for image processing applications.
It uses a half flash structure based on chopper com-
parators and achieves both high speed and low power
consumption with multiplexing.
It provides separate power supply pins for the circuits
driving the low-voltage digital output pins.
Pin Assignment
Features
Maximum conversion rate: 20 MSPS (min.)
Linearity error:
±0.9
LSB (typ.)
Differential linearity error:
±0.5
LSB (typ.)
Power supply voltage: 3.6 V or 2.6 V
Power consumption: 50 mW (typ.) (f
CLK
=16 MHz)
Applications
Digital video equipment
Digital image processing equipment
V
RBSA
V
RBA
DV
DD
DV
SS
NPOWDA
DV
SS
TEST1
TEST2
DA0
DA1
DA2
DA3
Digital television receivers
1
2
3
4
5
6
7
8
9
10
11
12
V
RTSB
V
RTB
AV
DD
V
INB
AV
SS
AV
DD
AV
SS
AV
SS
V
INA
AV
DD
V
RTA
V
RTSA
37
38
39
40
41
42
43
44
45
46
47
48
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
V
RBSO
V
RBB
DV
DD
DV
SS
NPOWDB
DV
SS
CLK
NOE
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DV
DD
DV
DDL
DV
DDL
DV
DD
DA7
DA6
DA5
DA4
(TOP VIEW)
QFH048-P-0707
1
2
V
INA
AV
DD
AV
SS
AV
SS
AV
SS
V
RTB
AV
DD
AV
DD
V
RTSB
V
INB
V
RTA
MN65752H
V
RTSA
46
45
44
43
42
41
40
39
38
37
36
Encoder
(4 bits)
V
RBSB
35
V
RBB
DV
DD
33
DV
SS
NPOWDB
DV
SS
CLK
29
Encoder (4 bits)
Encoder (4 bits)
28
27
26
(Channel A)
(Channel B)
25
DB5
DB4
NOE
DB7(MSB)
DB6
32
31
30
Lower comparator (4 bits)
Lower comparator (4 bits)
34
Encoder
(4 bits)
Block Diagram
48
47
V
RBSA
1
V
RBA
Upper
comparator
(4 bits)
Upper
comparator
(4 bits)
2
DV
DD
3
DV
SS
4
Clock generator
Clock generator
Data latch
Data latch
NPOWDA
Reference
resistor
Reference
resistor
5
6
DV
SS
TEST1
7
TEST2
8
(LSB)DA0
9
DA1
10
DA2
11
DA3
12
A/D, D/C Converters for Image Signal Processing
13
DV
DD
DV
DD
DV
DD
DV
DD
DA6
DA7(MSB)
14
15
16
17
18
19
20
21
22
DB1
23
DB2
24
DB3
DA4
DA5
DB0(LSB)
A/D, D/C Converters for Image Signal Processing
Pin Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Symbol
V
RBSA
V
RBA
DV
DD
DV
SS
NPOWDA
DV
SS
TEST1
TEST2
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
DV
DD
DV
DDL
DV
DDL
DV
DD
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
NOE
CLK
DV
SS
NPOWDB
DV
SS
DV
DD
V
RBB
V
RBSB
V
RTSB
V
RTB
AV
DD
V
INB
Function Description
Reference voltage power supply (BOTTOM)
Reference voltage input (BOTTOM)
Power supply for digital circuits
Ground for digital circuits
Power down mode selection
Ground for digital circuits
Test mode selection
Test mode selection
Digital code output (LSB)
Digital code output
Digital code output
Digital code output
Digital code output
Digital code output
Digital code output
Digital code output (MSB)
Power supply for digital circuits
Power supply for low-voltage digital outputs
Power supply for low-voltage digital outputs
Power supply for digital circuits
Digital code output (LSB)
Digital code output
Digital code output
Digital code output
Digital code output
Digital code output
Digital code output
Digital code output (MSB)
Digital output enable
Sampling clock
Ground for digital circuits
Power down mode selection
Ground for digital circuits
Power supply for digital circuits
Reference voltage input (BOTTOM)
Reference voltage power supply (BOTTOM)
Reference voltage power supply (TOP)
Reference voltage input (TOP)
Power supply for analog circuits
Ground for analog circuits
MN65752H
3
MN65752H
Pin Descriptions (continued)
Pin No.
41
42
43
44
45
46
47
48
Symbol
AV
SS
AV
DD
AV
SS
AV
SS
V
INA
AV
DD
V
RTA
V
RTSA
A/D, D/C Converters for Image Signal Processing
Function Description
Ground for analog circuits
Power supply for analog circuits
Ground for analog circuits
Ground for analog circuits
Analog signal input
Power supply for analog circuits
Reference voltage input (TOP)
Reference voltage power supply (TOP)
Ta=25˚C
Absolute Maximum Ratings
Parameter
Power supply voltage
Symbol
V
DD
DV
DDL
V
I
V
O
T
opr
T
stg
Rating
– 0.3 to +7.0
– 0.3 to V
DD
+0.3
– 0.3 to V
DD
+0.3
– 0.3 to V
DD
+0.3
–20 to +70
–55 to +125
Unit
V
V
V
V
˚C
˚C
Power supply voltage for digital output circuits
Input voltage
Output voltage
Operating ambient temperature
Storage temperature
Recommended Operating Conditions
Parameter
Power supply voltage
Power supply voltage for digital output circuits
Digital input
voltage
"H" level
"L" level
"L" level
Clock
"H" level pulse width
"L" level pulse width
Analog input voltage
V
DD
=AV
DD
=DV
DD
=3.6V, DV
DDL
=2..6V, V
SS
=AV
SS
=DV
SS
=0V, Ta=25˚C
Symbol
V
DD
DV
DDL
V
IH
V
IL
V
RT
V
RB
t
WH
t
WL
V
AIN
min
3.30
2.50
V
DD
×
0.55
V
SS
typ
3.60
2.60
max
5.25
5.25
V
DD
V
DD
×
0.2
Unit
V
V
V
V
V
V
ns
ns
Reference voltage "H" level
2.80
V
SS
20
20
V
SS
1.30
V
DD
V
DD
V
Electrical Characteristics
Parameter
Power consumption
Resolution
Linearity error
Differential linearity error
Maximum conversion rate
Clock frequency
Analog input dynamic range
Output
current
"H" level
"L" level
V
DD
=AV
DD
=DV
DD
=3.6V, DV
DDL
=2.6V, AV
SS
=DV
SS
=0V, Ta=25˚C
Symbol
Conditions
P
C
f
CLK
= 16 MSPS
(not including reference current)
RES
E
L
E
D
F
C(max.)
f
CLK
D
R
I
OH
I
OL
t
d
C
I
V
OH
=DV
DDL
– 0.8V
V
OL
=0.4V
C
L
=20pF
f
CLK
=20MSPS
V
RT
=2.8V, V
RB
=1.3V
min
typ
50
8
±0.9
±0.5
max
90
Unit
mW
bit
±1.8
±1.0
20
V
RT
–V
RB
–1.5
LSB
LSB
MSPS
MHz
V
mA
mA
ns
pF
20
1
1.5
1.5
10
25
15
40
Output delay time
Analog input capacitance
4
A/D, D/C Converters for Image Signal Processing
Timing Chart
MN65752H
The chip samples the analog input at the falling edge of the clock signal and provides the corresponding digital
output 2.5 clock cycles later at the rising edge of the clock signal.
t
WH
Clock
t
WL
Analog input
N
N+1
N–2
t
d
(25ns)
N+2
N–1
N+3
N
N+4
N+1
Data output
N–3
Note: The circles indicate analog signal sampling points.
5
MEMS传感器
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