74AVC16T245
16-bit dual supply translating transceiver with configurable
voltage translation; 3-state
Rev. 6 — 9 September 2013
Product data sheet
1. General description
The 74AVC16T245 is a 16-bit transceiver with bidirectional level voltage translation and
3-state outputs.The device can be used as two 8-bit transceivers or as a 16-bit
transceiver. It has dual supplies (V
CC(A)
and V
CC(B)
) for voltage translation and four 8-bit
input-output ports (nAn and nBn) each with its own output enable (nOE) and send/receive
(nDIR) input for direction control. V
CC(A)
and V
CC(B)
can be independently supplied at any
voltage between 0.8 V and 3.6 V making the device suitable for low voltage translation
between any of the following voltages: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. A HIGH
on nDIR selects transmission from nAn to nBn while a LOW on nDIR selects transmission
from nBn to nAn. A HIGH on nOE causes the outputs to assume a high-impedance
OFF-state
The device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing any damaging backflow current through the
device when it is powered down. In suspend mode when either V
CC(A)
or V
CC(B)
are at
GND level, both nAn and nBn are in the high-impedance OFF-state.
2. Features and benefits
Wide supply voltage range:
V
CC(A)
: 0.8 V to 3.6 V
V
CC(B)
: 0.8 V to 3.6 V
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3B exceeds 8000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101D exceeds 1000 V
Maximum data rates:
380 Mbit/s ( 1.8 V to 3.3 V translation)
200 Mbit/s ( 1.1 V to 3.3 V translation)
200 Mbit/s ( 1.1 V to 2.5 V translation)
200 Mbit/s ( 1.1 V to 1.8 V translation)
150 Mbit/s ( 1.1 V to 1.5 V translation)
Nexperia
74AVC16T245
16-bit dual supply translating transceiver; 3-state
100 Mbit/s ( 1.1 V to 1.2 V translation)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74AVC16T245DGG
74AVC16T245DGV
74AVC16T245EV
74AVC16T245BX
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
TSSOP48
Description
Version
plastic thin shrink small outline package; 48 leads; SOT362-1
body width 6.1 mm
Type number
TSSOP48
[1]
plastic thin shrink small outline package; 48 leads; SOT480-1
body width 4.4 mm; lead pitch 0.4 mm
VFBGA56
HXQFN60
plastic very thin fine-pitch ball grid array package; SOT702-1
56 balls; body 4.5
7
0.65 mm
plastic compatible thermal enhanced extremely
thin quad flat package; no leads; 60 terminals;
body 4
6
0.5 mm
SOT1134-2
[1]
Also known as TVSOP48.
4. Functional diagram
1DIR
1OE
2DIR
2OE
1A1
1B1
V
CC(A)
V
CC(B)
2A1
2B1
V
CC(A)
V
CC(B)
001aak426
to other seven channels
to other seven channels
Fig 1.
Logic diagram
74AVC16T245
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 6 — 9 September 2013
2 of 28
Nexperia
74AVC16T245
16-bit dual supply translating transceiver; 3-state
5. Pinning information
5.1 Pinning
74AVC16T245
1DIR
1B1
1B2
GND
1B3
1B4
V
CC(B)
1B5
1B6
1
2
3
4
5
6
7
8
9
48 1OE
47 1A1
46 1A2
45 GND
44 1A3
43 1A4
42 V
CC(A)
41 1A5
40 1A6
39 GND
38 1A7
37 1A8
36 2A1
35 2A2
34 GND
33 2A3
32 2A4
31 V
CC(A)
30 2A5
29 2A6
28 GND
27 2A7
26 2A8
25 2OE
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GND 10
1B7 11
1B8 12
2B1 13
2B2 14
GND 15
2B3 16
2B4 17
V
CC(B)
18
2B5 19
2B6 20
GND 21
2B7 22
2B8 23
2DIR 24
ball A1
74AVC16T245
index area
1 2 3 4 5 6
A
B
C
D
E
F
G
H
J
K
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Transparent top view
Fig 3. Pin configuration SOT362-1 and SOT480-1
(TSSOP48)
Fig 4.
Pin configuration SOT702-1 (VFBGA56)
74AVC16T245
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 6 — 9 September 2013
4 of 28
Nexperia
74AVC16T245
16-bit dual supply translating transceiver; 3-state
terminal 1
index area
D1
A32
A31
A30
A29
A28
A27
D4
A1
D5
B20
B19
B18
D8
A26
A2
B1
A3
B2
A4
B3
A5
B4
A6
B5
A7
B6
A8
B7
A9
GND
(1)
B11
B12
B13
B15
B16
B17
A25
A24
A23
A22
74AVC16T245
B14
A21
A20
A19
A18
A10
D6
B8
B9
B10
D7
A17
D2
A11
A12
A13
A14
A15
A16
D3
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Transparent top view
(1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or
mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to
GND.
Fig 5.
Pin configuration SOT1134-2 (HXQFN60)
74AVC16T245
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 6 — 9 September 2013
5 of 28
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