24AA014/24LC014
1K I
2
C
™
Serial EEPROM
Device Selection Table
Part
Number
24AA014
24LC014
V
CC
Range
Max
Clock
Temp.
Range
I
I, E
Description:
The Microchip Technology Inc. 24AA014/24LC014 is a
1 Kbit Serial Electrically Erasable PROM with opera-
tion down to 1.7V. The device is organized as a single
block of 128 x 8-bit memory with a 2-wire serial inter-
face. Low-current design permits operation with typical
standby and active currents of only 1
A
and 1 mA,
respectively. The device has a page write capability for
up to 16 bytes of data. Functional address lines allow
the connection of up to eight 24AA014/24LC014
devices on the same bus for up to 8 Kbits of contiguous
EEPROM memory. The device is available in the
standard 8-pin PDIP, 8-pin SOIC (150 mil), TSSOP, 2x3
DFN and TDFN and MSOP packages. The 24AA014/
24LC014 is also available in the 6-lead SOT-23
package.
1.7V - 5.5V 400 kHz
(1)
2.5V - 5.5V
400 kHz
Note 1:
100 kHz for V
CC
< 2.5V
Features:
• Single-Supply with Operation down to 1.7V
• Low-Power CMOS Technology:
- 1 mA active current, typical
- 1
A
standby current, typical at 5.5V
• Organized as a Single Block of 128 Bytes
(128 x 8)
• Hardware Write Protection for Entire Array
• 2-Wire Serial Interface Bus, I
2
C™ Compatible
• 100 kHz and 400 kHz Clock Compatibility
• Page Write Buffer for up to 16 Bytes
• Self-Timed Write Cycle (including auto-erase)
• 5 ms max. Write Cycle Time
• Address Lines allow up to Eight Devices on Bus
• 1,000,000 Erase/Write Cycles
• ESD Protection > 4,000V
• Data Retention > 200 Years
• 8-Lead PDIP, SOIC, TSSOP, DFN, TDFN and
MSOP Packages
• 6-Lead SOT-23 Package
• Pb-Free and RoHS Compliant
• Available for Extended Temperature Ranges:
- Industrial (I):
- Automotive (E)
-40°C to +85°C
-40°C to +125°C
Package Types
PDIP/SOIC/TSSOP/MSOP
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
A0 1
A1 2
A2 3
V
SS
4
DFN/TDFN
8 V
CC
7 WP
6 SCL
5 SDA
SOT-23
SCL
V
SS
SDA
1
2
3
6
5
4
V
CC
A0
A1
Block Diagram
A0 A1 A2
WP
HV Generator
I/O
Control
Logic
Memory
Control
Logic
XDEC
EEPROM
Array
SDA SCL
V
CC
V
SS
Write-Protect
Circuitry
YDEC
Sense Amp.
R/W Control
2010 Microchip Technology Inc.
DS21809G-page 1
24AA014/24LC014
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
(†)
V
CC
.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. V
SS
......................................................................................................... -0.6V to V
CC
+1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-40°C to +125°C
ESD protection on all pins
4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
TABLE 1-1:
DC SPECIFICATIONS
Industrial (I):
T
A
= -40°C to +85°C, V
CC
= +1.7V to +5.5V
Automotive (E): T
A
= -40°C to +125°C, V
CC
= +2.5V to +5.5V
Min.
—
0.7 V
CC
—
0.05 V
CC
—
—
—
—
—
—
Standby current
—
—
Typ.
—
—
—
—
—
—
—
—
0.1
0.05
0.01
—
Max.
—
—
0.3 V
CC
—
0.40
±1
±1
10
3
1
1
5
Units
—
V
V
V
V
A
A
pF
mA
mA
A
A
—
—
0.2 V
CC
for V
CC
< 2.5V
(Note)
I
OL
= 3.0 mA, V
CC
= 2.5V
V
IN
= V
SS
or V
CC
V
OUT
= V
SS
or V
CC
V
CC
= 5.5V
(Note)
T
A
= 25°C, F
CLK
= 1 MHz
V
CC
= 5.5V, SCL = 400 kHz
—
Industrial
Automotive
SDA = SCL = V
CC
A0, A1, A2, WP = V
SS
Conditions
DC CHARACTERISTICS
Param.
Symbol
No.
—
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
V
IH
V
IL
V
HYS
V
OL
I
LI
I
LO
C
IN
,
C
OUT
I
CC
read
I
CCS
Characteristic
A0, A1, A2, SCL, SDA
and WP pins
High-level input voltage
Low-level input voltage
Hysteresis of Schmitt
Trigger inputs
Low-level output voltage
Input leakage current
Output leakage current
Pin capacitance
(all inputs/outputs)
I
CC
write Operating current
Note:
This parameter is periodically sampled and not 100% tested.
DS21809G-page 2
2010 Microchip Technology Inc.
24AA014/24LC014
TABLE 1-2:
AC CHARACTERISTICS
Industrial (I):
T
A
= -40°C to +85°C, V
CC
= +1.7V to +5.5V
Automotive (E): T
A
= -40°C to +125°C, V
CC
= +2.5V to +5.5V
Characteristic
Min.
Max.
Units
Conditions
AC CHARACTERISTICS
Param.
No.
Symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
F
CLK
T
HIGH
T
LOW
T
R
T
F
T
HD
:
STA
T
SU
:
STA
T
HD
:
DAT
T
SU
:
DAT
T
SU
:
STO
T
SU
:
WP
T
HD
:
WP
T
AA
T
BUF
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
(Note
1)
SDA and SCL fall time
(Note
1)
Start condition hold time
Start condition setup time
Data input hold time
Data input setup time
Stop condition setup time
WP setup time
WP hold time
Output valid from clock
(Note
2)
Bus free time: Time the bus must
be free before a new transmission
can start
Input filter spike suppression
(SDA and SCL pins)
Write cycle time (byte or page)
Endurance
—
—
4000
600
4700
1300
—
—
—
—
4000
600
4700
600
0
250
100
4000
600
4000
600
4700
600
—
—
4700
1300
—
—
1M
100
400
—
—
—
—
1000
300
1000
300
—
—
—
—
—
—
—
—
—
—
—
—
—
3500
900
—
—
50
5
—
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
(Note
2)
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
1.7V
V
CC
< 1.8V
1.8V
V
CC
5.5V
(Note
1
and
Note 3)
—
25°C, V
CC
= 5.5V, Block mode
(Note
4)
16
17
18
T
SP
T
WC
—
ns
ms
cycles
Note 1:
Not 100% tested. C
B
= total capacitance of one bus line in pF.
2:
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum
300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3:
The combined T
SP
and V
HYS
specifications are due to new Schmitt Trigger inputs, which provide improved noise spike
suppression. This eliminates the need for a T
I
specification for standard operation.
4:
This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please
consult the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
2010 Microchip Technology Inc.
DS21809G-page 3
24AA014/24LC014
FIGURE 1-1:
BUS TIMING DATA
5
2
D4
4
SCL
SDA
In
7
6
16
3
8
9
10
13
SDA
Out
(protected)
(unprotected)
14
WP
11
12
DS21809G-page 4
2010 Microchip Technology Inc.
24AA014/24LC014
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in
Table 2-1.
TABLE 2-1:
Name
A0
A1
A2
V
SS
SDA
SCL
WP
V
CC
1
2
3
4
5
6
7
8
PIN FUNCTION TABLE
SOIC
1
2
3
4
5
6
7
8
TSSOP
1
2
3
4
5
6
7
8
DFN
(1)
1
2
3
4
5
6
7
8
TDFN
(1)
1
2
3
4
5
6
7
8
MSOP
1
2
3
4
5
6
7
8
SOT-23
5
4
—
2
3
1
—
6
Description
Chip Address Input
Chip Address Input
Chip Address Input
Ground
Serial Address/Data I/O
Serial Clock
Write-Protect Input
+1.7V to 5.5V Power Supply
PDIP
Note 1:
The exposed pad on the DFN/TDFN packages can be connected to V
SS
or left floating.
2.1
A0, A1, A2 Chip Address Inputs
2.3
Serial Clock (SCL)
The A0, A1 and A2 inputs are used by the 24AA014/
24LC014 for multiple device operation. The levels on
these inputs are compared with the corresponding bits
in the slave address. The chip is selected if the com-
pare is true.
Up to eight devices may be connected to the same bus
by using different Chip Select bit combinations. These
inputs must be connected to either V
CC
or V
SS
.
For the SOT-23 devices up to four devices may be con-
nected to the same bus using different Chip Select bit
combinations.
In most applications, the chip address inputs A0, A1
and A2 are hard-wired to logic ‘0’ or logic ‘1’. For
applications in which these pins are controlled by a
microcontroller or other programmable device, the chip
address pins must be driven to logic ‘0’ or logic ‘1’
before normal device operation can proceed.
The SCL input is used to synchronize the data transfer
from and to the device.
2.4
Write-Protect (WP)
This pin must be connected to either V
SS
or V
CC
. If tied
to V
SS
, write operations are enabled. If tied to V
CC
,
write operations are inhibited but read operations are
not affected.
3.0
FUNCTIONAL DESCRIPTION
2.2
Serial Data (SDA)
SDA is a bidirectional pin used to transfer addresses
and data into and out of the device. Since it is an open-
drain terminal, the SDA bus requires a pull-up resistor
to V
CC
(typical 10 k for 100 kHz, 2 kfor 400 kHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
The 24AA014/24LC014 supports a bidirectional, 2-wire
bus and data transmission protocol. A device that
sends data onto the bus is defined as transmitter, while
a device receiving data is defined as a receiver. The
bus has to be controlled by a master device which gen-
erates the Serial Clock (SCL), controls the bus access
and generates the Start and Stop conditions, while the
24AA014/24LC014 works as slave. Both master and
slave can operate as transmitter or receiver, but the
master device determines which mode is activated.
2010 Microchip Technology Inc.
DS21809G-page 5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
