NXP Semiconductors
Data Sheet: Technical Data
Document Number MKE02P64M40SF0
Rev. 4, 07/2016
KE02 Sub-Family Data Sheet
Supports the following:
MKE02Z16VLC4(R),
MKE02Z32VLC4(R),
MKE02Z64VLC4(R),
MKE02Z16VLD4(R),
MKE02Z32VLD4(R),
MKE02Z64VLD4(R),
MKE02Z32VLH4(R),
MKE02Z64VLH4(R),
MKE02Z32VQH4(R),
MKE02Z64VQH4(R),
MKE02Z16VFM4(R),
MKE02Z32VFM4(R), and
MKE02Z64VFM4(R)
MKE02P64M40SF0
Key features
• Operating characteristics
– Voltage range: 2.7 to 5.5 V
– Flash write voltage range: 2.7 to 5.5 V
– Temperature range (ambient): -40 to 105°C
• Performance
– Up to 40 MHz ARM® Cortex-M0+ core and up to
20 MHz bus clock
– Single cycle 32-bit x 32-bit multiplier
– Single cycle I/O access port
• Memories and memory interfaces
– Up to 64 KB flash
– Up to 256 B EEPROM
– Up to 4 KB RAM
• Clocks
– Oscillator (OSC) - supports 32.768 kHz crystal or 4
MHz to 20 MHz crystal or ceramic resonator; choice
of low power or high gain oscillators
– Internal clock source (ICS) - internal FLL with
internal or external reference, 31.25 kHz pre-
trimmed internal reference for 32 MHz system clock
(able to be trimmed for up to 40 MHz system clock)
– Internal 1 kHz low-power oscillator (LPO)
• System peripherals
– Power management module (PMC) with three power
modes: Run, Wait, Stop
– Low-voltage detection (LVD) with reset or interrupt,
selectable trip points
– Watchdog with independent clock source (WDOG)
– Programmable cyclic redundancy check module
(CRC)
– Serial wire debug interface (SWD)
– Bit manipulation engine (BME)
• Security and integrity modules
– 64-bit unique identification (ID) number per chip
• Human-machine interface
– Up to 57 general-purpose input/output (GPIO)
– Two up to 8-bit keyboard interrupt modules (KBI)
– External interrupt (IRQ)
• Analog modules
– One up to 16-channel 12-bit SAR ADC, operation in
Stop mode, optional hardware trigger (ADC)
– Two analog comparators containing a 6-bit DAC
and programmable reference input (ACMP)
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.
• Timers
– One 6-channel FlexTimer/PWM (FTM)
– Two 2-channel FlexTimer/PWM (FTM)
– One 2-channel periodic interrupt timer (PIT)
– One real-time clock (RTC)
• Communication interfaces
– Two SPI modules (SPI)
– Up to three UART modules (UART)
– One I2C module (I2C)
• Package options
– 64-pin QFP/LQFP
– 44-pin LQFP
– 32-pin LQFP
– 32-pin QFN
KE02 Sub-Family Data Sheet, Rev. 4, 07/2016
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NXP Semiconductors
Table of Contents
1 Ordering parts.......................................................................................4
1.1 Determining valid orderable parts............................................... 4
2 Part identification................................................................................. 4
2.1 Description...................................................................................4
2.2 Format.......................................................................................... 4
2.3 Fields............................................................................................4
2.4 Example....................................................................................... 5
3 Parameter classification........................................................................5
4 Ratings..................................................................................................6
4.1 Thermal handling ratings............................................................. 6
4.2 Moisture handling ratings............................................................ 6
4.3 ESD handling ratings................................................................... 6
4.4 Voltage and current operating ratings..........................................7
5 General................................................................................................. 7
5.1 Nonswitching electrical specifications........................................ 7
5.1.1
5.1.2
5.1.3
DC characteristics.......................................................... 7
Supply current characteristics........................................ 14
EMC performance..........................................................15
5.2.2
FTM module timing....................................................... 17
5.3 Thermal specifications................................................................. 18
5.3.1
5.3.2
Thermal operating requirements.................................... 18
Thermal characteristics.................................................. 19
6 Peripheral operating requirements and behaviors................................ 20
6.1 Core modules............................................................................... 20
6.1.1
SWD electricals .............................................................20
6.2 External oscillator (OSC) and ICS characteristics.......................21
6.3 NVM specifications..................................................................... 23
6.4 Analog..........................................................................................24
6.4.1
6.4.2
ADC characteristics....................................................... 25
Analog comparator (ACMP) electricals.........................27
6.5 Communication interfaces........................................................... 28
6.5.1
SPI switching specifications.......................................... 28
7 Dimensions...........................................................................................31
7.1 Obtaining package dimensions.................................................... 31
8 Pinout................................................................................................... 32
8.1 Signal multiplexing and pin assignments.................................... 32
8.2 Device pin assignment................................................................. 34
9 Revision history....................................................................................36
5.2 Switching specifications.............................................................. 16
5.2.1
Control timing................................................................ 16
KE02 Sub-Family Data Sheet, Rev. 4, 07/2016
NXP Semiconductors
3
Ordering parts
1 Ordering parts
1.1 Determining valid orderable parts
Valid orderable part numbers are provided on the web. To determine the orderable part
numbers for this device, go to
nxp.com
and perform a part number search for the
following device numbers: KE02Z.
2 Part identification
2.1 Description
Part numbers for the chip have fields that identify the specific part. You can use the
values of these fields to determine the specific part you have received.
2.2 Format
Part numbers for this device have the following format:
Q KE## A FFF R T PP CC N
2.3 Fields
This table lists the possible values for each field in the part number (not all combinations
are valid):
Field
Q
KE##
A
FFF
Description
Qualification status
Kinetis family
Key attribute
Program flash memory size
Values
• M = Fully qualified, general market flow
• P = Prequalification
• KE02
• Z = M0+ core
• 16 = 16 KB
• 32 = 32 KB
• 64 = 64 KB
• (Blank) = Main
• A = Revision after main
R
Silicon revision
Table continues on the next page...
KE02 Sub-Family Data Sheet, Rev. 4, 07/2016
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NXP Semiconductors
Parameter classification
Field
T
PP
Description
Temperature range (°C)
Package identifier
• V = –40 to 105
•
•
•
•
•
LC = 32 LQFP (7 mm x 7 mm)
FM = 32 QFN (5 mm x 5 mm)
LD = 44 LQFP (10 mm x 10 mm)
QH = 64 QFP (14 mm x 14 mm)
LH = 64 LQFP (10 mm x 10 mm)
Values
CC
N
Maximum CPU frequency (MHz)
Packaging type
• 4 = 40 MHz
• R = Tape and reel
• (Blank) = Trays
2.4 Example
This is an example part number:
MKE02Z64VQH4
3 Parameter classification
The electrical parameters shown in this supplement are guaranteed by various methods.
To give the customer a better understanding, the following classification is used and the
parameters are tagged accordingly in the tables where appropriate:
Table 1. Parameter classifications
P
C
T
D
Those parameters are guaranteed during production testing on each individual device.
Those parameters are achieved by the design characterization by measuring a statistically relevant sample size
across process variations.
Those parameters are achieved by design characterization on a small sample size from typical devices under
typical conditions unless otherwise noted. All values shown in the typical column are within this category.
Those parameters are derived mainly from simulations.
NOTE
The classification is shown in the column labeled “C” in the
parameter tables where appropriate.
KE02 Sub-Family Data Sheet, Rev. 4, 07/2016
NXP Semiconductors
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