Supertex inc.
32-Channel Vacuum-Fluorescent
Display Driver
Features
General Description
HV518
►
32 output lines
►
90V output swing
►
Active pull-down
►
Latches on all outputs
The
HV518 is designed for vacuum fluorescent or DC plasma
applications, where it can serve as a segment, digit or matrix
display driver. Each device has 32 outputs, 32 latches and a
32-bit cascadable shift register.
Serial data enters the shift register on the LOW-to-HIGH
transition of the clock input. With latch enable (LE) HIGH,
parallel data is transferred to the output buffers through a
32-bit latch. When LE is low the data is stored in the latch.
When STROBE (STR) is LOW, all outputs are enabled; if
STROBE is HIGH, all outputs are LOW.
►
Up to 6.0MHz @ V
DD
= 5.0V
►
-40°C to +85°C operation
Applications
►
Vacuum flourescent displays
►
DC plasma displays
Block Diagram
LE
STR
VPP
DIN
CLK
DOUT
HV
OUT
1
32-Bit
Shift
Register
Latches
HV
OUT
32
Doc.# DSFP-HV518
C072413
Supertex inc.
www.supertex.com
HV518
Ordering Information
Part Number
HV518P-G
HV518PJ-G
HV518PJ-G M903
Package
40-Lead PDIP
44-Lead PLCC
44-Lead PLCC
Packing
9/Tube
27/Tube
500/Reel
Pin Configurations
1
40
-G denotes a lead (Pb)-free / RoHS compliant package
Absolute Maximum Ratings
Parameter
Supply voltage, V
DD
Supply voltage, V
PP
Logic input levels
Continuous total power dissipation
Operating temperature
Storage temperature
1,2
Value
-0.5V to +6.0V
-0.5V to +90V
-0.5V to V
DD
+0.5V
1200mW
-40°C to +85°C
-65°C to +150°C
6
40-Lead PDIP
(top view)
1 44
40
Absolute Maximum Ratings are those values beyond which damage to the
device may occur. Functional operation under these conditions is not implied.
Continuous operation of the device at the absolute rating level may affect device
reliability. All voltages are referenced to GND.
Notes:
1. Duty cycle is limited by the total power dissipated in the package.
2. For operation above 25
O
C ambient, derate linearly to 85
O
C at 20mW/
O
C.
44-Lead PLCC
(top view)
Typical Thermal Resistance
Package
40-Lead PDIP
44-Lead PLCC
θ
ja
39
O
C/W
37
O
C/W
Product Marking
Top Marking
HV 518P
YYWW
LLLLLLLLLL
Bottom Marking
CCCCCCCCCCC
AAA
Y = Last Digit of Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
Package may or may not include the following marks: Si or
40-Lead PDIP
Top Marking
HV518PJ
YYWW
LLLLLLLLLL
Bottom Marking
CCCCCCCCCCC
AAA
YY = Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
Package may or may not include the following marks: Si or
44-Lead PLCC
Doc.# DSFP-HV518
C072413
2
Supertex inc.
www.supertex.com
HV518
Recommended Operating Conditions
(T
Sym
V
DD
V
PP
V
IH
V
IL
I
OH
I
OL
f
CLK
t
w(CKH)
t
w(CKL)
t
su
t
h
T
A
Parameter
Logic supply voltage
High voltage supply
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Clock frequency
Pulse duration, clock high
Pulse duration, clock low
Setup time, data before clock
Hold time, data after clock
Operating ambient temperature
A
= 25°C, unless otherwise noted)
Min
4.5
8.0
3.5
-
-25
-
-
83
83
75
75
-40
Max
5.5
80
-
1.0
-
2.0
6.0
-
-
-
-
85
Unit
V
V
V
V
mA
mA
MHz
ns
ns
ns
ns
°C
Conditions
---
---
V
DD
= 4.5V, See Figure 1
V
DD
= 4.5V, See Figure 1
---
---
V
DD
= 4.5V, See Figure 1
V
DD
= 4.5V
V
DD
= 4.5V
V
DD
= 4.5V
V
DD
= 4.5V
---
Electrical Characteristics
(over recommended ranges of operating ambient temperature unless otherwise noted.)
Sym
I
DD
I
DDQ
I
PP
Parameter
Supply current
Quiescent supply current
Supply current
HV output
Serial output
HV output
Serial output
Min
-
-
-
-
-
V
OH
V
OL
I
IH
I
IL
HV
IN
operating current
LV
IN
operating current
Logic input current high
Logic input current low
70
4.5
-
-
-
-
Typ
-
-
-
7.0
-
-
4.9
-
0.06
0.1
-0.1
Max
10
0.5
12
10
500
-
5.0
5.0
0.8
1.0
-1.0
Units
mA
mA
mA
mA
µA
V
V
µA
µA
Conditions
V
DD
= 5.0V, f
CH
= 6.0 MHz
V
DD
= 5.5V, V
IN
= 0V
Outputs high, T
A
= -40
O
Outputs high, T
A
= 0 to +85
O
Outputs low
I
OH
= -25mA
V
DD
= 5.0V, I
OH
= -20µA
I
OL
= 1.0mA
I
OL
= 20µA
V
IH
= V
DD
V
IL
= 0V
Note:
The total number of ON outputs times the duty cycle must not exceed the allowable package power disspation.
Switching Characteristics
(V
Sym
t
d
t
DHL
t
DLH
t
THL
t
TLH
Parameter
Delay time, clock to data output
Delay time, high-to-low-
level, HV output
Delay time, low-to-high-
level, HV output
PP
= 80V, C
L
= 50pF, T
A
= 25°C, unless otherwise noted)
Min
-
-
-
-
-
-
-
From latch enable
From strobe
From latch enable
From strobe
Typ
-
-
-
-
-
-
-
Max
600
1.5
1.0
1.5
1.0
3.0
2.5
Unit
ns
µs
µs
µs
µs
Conditions
C
L
= 15pF, See Figure 2
V
DD
= 4.5V, See Figure 3
V
DD
= 4.5V, See Figure 4
V
DD
= 4.5V, See Figure 3
V
DD
= 4.5V, See Figure 4
V
DD
= 4.5V, See Figure 4
V
DD
= 4.5V, See Figure 4
Transition time, high-to-low-level, HV output
Transition time, low-to-high-level, HV output
Doc.# DSFP-HV518
C072413
3
Supertex inc.
www.supertex.com
HV518
Power-Up/ Power-Down Sequences
Power-up sequence should be the following:
1. Connect ground.
2.
Apply V
DD
.
3.
Set all inputs (Data, CLK, EN, etc.) to a known state.
4.
Apply V
PP
.
The V
PP
should not drop below V
DD
or float during operation.
Power-down sequence should be the reverse of the above.
Input and Output Equivalent Circuits
VDD
VDD
VPP
INPUT
DATA
OUT
HV
OUT
GND
Logic Inputs
GND
Logic Data Output
GND
High Voltage Outputs
Parameter Measurement Information
t
w(CKH)
V
IH
CLK
50%
t
d
V
IH
V
IL
DATA
OUTPUT
V
IL
t
w(CKH)
CLK
V
IH
V
IL
50%
t
w(CKL)
t
SU
t
h
DATA
IN
50%
V
OH
V
OL
Figure 1:
Input Timing Voltage Waveforms
V
IH
V
IL
t
DLH
or t
DHL
HV
OUTPUT
90%
10%
V
OH
V
OL
HV
OUTPUT
STR
t
DLH
Figure 2
V
IH
50%
t
DHL
90%
10%
t
THL
V
IL
V
OH
V
OL
LE
50%
Figure 3
Note:
For testing purposes, all input pulses have maximum rise and fall times of 30 nsec.
Doc.# DSFP-HV518
C072413
Figure 4:
Switching-Time Voltage Waveforms
4
Supertex inc.
www.supertex.com
HV518
Truth Tables
Input
Data In
H
L
X
* Previous state.
Output
CLK
Data Out
H
L
No Change
*
Data In
X
H
L
X
* Previous state.
LE
X
H
H
L
STR
H
L
L
L
HV Outputs
All Low
High
Low
*
Typical Operating Sequence
CLK
DATA
IN
VALID
IRRELEVANT
SR
CONTENTS
INVALID
VALID
LE
LATCH
CONTENTS
PREVIOUSLY STORED DATA
NEW DATA VALID
STR
HV
OUTPUT
VALID
Doc.# DSFP-HV518
C072413
5
Supertex inc.
www.supertex.com
Microchip MCU
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